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參數(shù)資料
| 型號(hào)： | MC68HC000FN10 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Addendum to M68000 User Manual |
| 中文描述： | 32-BIT, 10 MHz, MICROPROCESSOR, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁數(shù)： | 5/26頁 |
| 文件大小： | 124K |
| 代理商： | MC68HC000FN10 |
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5
M68000 USER’S MANUAL ADDENDUM
MOTOROLA
power consumption to its quiescent value
low-power mode described below will be routinely tested as part of the MC68SEC000 test vectors provided
by Motorola.
1
while maintaining the internal state of the processor. The
To successfully enter the low-power mode, the MC68SEC000 must first be in the supervisor mode. A
recommended method for entering the low-power mode is to use the TRAP instruction, which causes the
processor to begin exception processing, thus entering the supervisor mode. External circuitry should
accomplish the following steps during the trap routine:
1.
Externally detect a write to the low-power address. You select this address which can be any address
in the 16 Mbyte addressing range of the MC68SEC000. A write to the low-power address can be
detected by polling A23–A0, R/W, and FC2–FC0. When the low-power address is detected, R/W is
a logic low, and the function codes have a five (101) on their output, the processor is writing to the
low-power address in supervisor mode and user-designed circuitry should assert the
ADDRESS_MATCH signal shown in Figure 2 and Figure 3.
Figure 3. MC68SEC000 Low-Power Circuitry for 8-Bit Data Bus
2.
Execute the STOP instruction. The external circuitry shown in Figure 2 and Figure 3 will count the
number of bus cycles starting with the write to the low-power address and will stop the processor
clock on the first falling edge of the system clock after the bus cycle that reads the immediate data
of the STOP instruction. Figure 3 has one more flip-flop than Figure 2 because the MC68SEC000 in
1.
The preliminary specification for the MC68SEC000’s current drain while in the low-power mode is Idd < 2
Idd < 5
μ
A for 5.0V operation.
μ
A for 3.3V operation and
Figure 2. MC68SEC000 Low-Power Circuitry for 16-Bit Data Bus
D
Q
Q
CL
CK
D
Q
CK
D
Q
CK
ADDRESS_MATCH
AS
RESTART
RESET
CPU_CLK
SYSTEM_CLK
Q
Q
AS
CL
D
Q
Q
CL
CK
D
Q
Q
CL
CK
D
Q
Q
CK
ADDRESS_MATCH
RESTART
RESET
CPU_CL
D
Q
Q
CL
CK
SYSTEM_CLK
AS
AS
AS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68HC000FN12 | Addendum to M68000 User Manual |
| MC68HC000FN16 | Addendum to M68000 User Manual |
| MC68HC000FN20 | Addendum to M68000 User Manual |
| MC68HC000FN8 | Addendum to M68000 User Manual |
| MC68HC000P10 | Addendum to M68000 User Manual |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC000FN12 | 制造商:Motorola Inc 功能描述: 制造商:MOTOROLA 功能描述: |
| MC68HC000FN16 | 功能描述:IC MPU 32BIT 16MHZ 68-PLCC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:M680x0 標(biāo)準(zhǔn)包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點(diǎn):- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應(yīng)商設(shè)備封裝:357-PBGA（25x25） 包裝:托盤 |
| MC68HC000FN16R2 | 功能描述:IC MPU 32BIT 16MHZ 68-PLCC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:M680x0 標(biāo)準(zhǔn)包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點(diǎn):- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應(yīng)商設(shè)備封裝:357-PBGA（25x25） 包裝:托盤 |
| MC68HC000FN20 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Addendum to M68000 User Manual |
| MC68HC000FN8 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Addendum to M68000 User Manual |
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