參數(shù)資料
型號: MC68334GCFC20
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 20 MHz, MICROCONTROLLER, PQFP132
封裝: PLASTIC, QFP-132
文件頁數(shù): 27/76頁
文件大?。?/td> 444K
代理商: MC68334GCFC20
MC68334
MOTOROLA
MC68334TS/D REV. 1
33
CSORBT, the option register for CSBOOT, contains special reset values that support bootstrap opera-
tions from peripheral memory devices.
The following bit descriptions apply to both CSORBT and CSOR[10:0] option registers.
MODE — Asynchronous/Synchronous Mode
0 = Asynchronous mode selected (chip-select assertion determined by internal or external bus con-
trol signals)
1 = Synchronous mode selected (chip-select assertion synchronized with ECLK signal)
In asynchronous mode, the chip select is asserted synchronized with AS or DS.
The DSACK field is not used in synchronous mode because a bus cycle is only performed as a syn-
chronous operation. When a match condition occurs on a chip select programmed for synchronous op-
eration, the chip select signals the EBI that an ECLK cycle is pending.
BYTE — Upper/Lower Byte Option
This field is used only when the chip-select 16-bit port option is selected in the pin assignment register.
The following table lists upper/lower byte options.
R/W — Read/Write
This field causes a chip select to be asserted only for a read, only for a write, or for both read and write.
Refer to the following table for options available.
STRB — Address Strobe/Data Strobe
0 = Address strobe
1 = Data strobe
This bit controls the timing for assertion of a chip select in asynchronous mode. Selecting address
strobe causes chip select to be asserted synchronized with address strobe. Selecting data strobe caus-
es chip select to be asserted synchronized with data strobe.
DSACK — Data and Size Acknowledge
This field specifies the source of DSACK in asynchronous mode. It also allows the user to adjust bus
timing with internal DSACK generation by controlling the number of wait states that are inserted to op-
timize bus speed in a particular application. The following table shows the DSACK field encoding. The
fast termination encoding (1110) is used for two-cycle access to external memory.
Byte
Description
00
Disable
01
Lower Byte
10
Upper Byte
11
Both Bytes
R/W
Description
00
Reserved
01
Read Only
10
Write Only
11
Read/Write
相關PDF資料
PDF描述
MC68334MFC20 32-BIT, 20 MHz, MICROCONTROLLER, PQFP132
MC68334VFC20 32-BIT, 20 MHz, MICROCONTROLLER, PQFP132
MC68334AVFC20 32-BIT, 20 MHz, MICROCONTROLLER, PQFP132
MC68334VFC16 32-BIT, 16 MHz, MICROCONTROLLER, PQFP132
MC68336AMFT20 32-BIT, 20.97 MHz, MICROCONTROLLER, PQFP16
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