- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371043 > MC68332TS (Motorola, Inc.) 32-Bit Modular Microcontroller PDF資料下載
參數(shù)資料
| 型號： | MC68332TS |
| 廠商： | Motorola, Inc. |
| 英文描述： | 32-Bit Modular Microcontroller |
| 中文描述： | 32位微控制器模塊 |
| 文件頁數(shù)： | 68/88頁 |
| 文件大?。?/td> | 446K |
| 代理商： | MC68332TS |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁當(dāng)前第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁
MOTOROLA
68
MC68332
MC68332TS/D
At reset, QIVR is initialized to $0F, which corresponds to the uninitialized interrupt vector in the excep-
tion table. This vector is selected until QIVR is written. A user-defined vector ($40–$FF) should be writ-
ten to QIVR during QSM initialization.
After initialization, QIVR determines which two vectors in the exception vector table are to be used for
QSM interrupts. The QSPI and SCI submodules have separate interrupt vectors adjacent to each other.
Both submodules use the same interrupt vector with the least significant bit (LSB) determined by the
submodule causing the interrupt.
The value of INTV0 used during an interrupt-acknowledge cycle is supplied by the QSM. During an in-
terrupt-acknowledge cycle, INTV[7:1] are driven on DATA[7:1] IMB lines. DATA0 is negated for an SCI
interrupt and asserted for a QSPI interrupt. Writes to INTV0 have no meaning or effect. Reads of INTV0
return a value of one.
6.4.2 Pin Control Registers
The QSM uses nine pins, eight of which form a parallel port (PORTQS) on the MCU. Although these
pins are used by the serial subsystems, any pin can alternately be assigned as general-purpose I/O on
a pin-by-pin basis.
Pins used for general-purpose I/O must not be assigned to the QSPI by register PQSPAR. To avoid
driving incorrect data, the first byte to be output must be written before DDRQS is configured. DDRQS
must then be written to determine the direction of data flow and to output the value contained in register
PORTQS. Subsequent data for output is written to PORTQS.
PORTQS latches I/O data. Writes drive pins defined as outputs. Reads return data present on the pins.
To avoid driving undefined data, first write a byte to PORTQS, then configure DDRQS.
Clearing a bit in the PQSPAR assigns the corresponding pin to general-purpose I/O; setting a bit as-
signs the pin to the QSPI. The PQSPAR does not affect operation of the SCI.
QIVR
— QSM Interrupt Vector Register
$YFFC05
15
8
7
0
QILR
INTV
RESET:
0
0
0
0
1
1
1
1
PORTQS
— Port QS Data Register
$YFFC14
15
8
7
6
5
4
3
2
1
0
NOT USED
PQS7
PQS6
PQS5
PQS4
PQS3
PQS2
PQS1
PQS0
RESET:
0
0
0
0
0
0
0
0
PQSPAR
— PORT QS Pin Assignment Register
DDRQS
— PORT QS Data Direction Register
$YFFC16
$YFFC17
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
PQSPA6 PQSPA5 PQSPA4 PQSPA3
0
PQSPA1 PQSPA0
DDQS7 DDQS6 DDQS5 DDQS4 DDQS3 DDQS2 DDQS1 DDQS0
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68332GCFC16 | 32-Bit Modular Microcontroller |
| MC68332GCFC20 | 32-Bit Modular Microcontroller |
| MC68332GCFV20 | 32-Bit Modular Microcontroller |
| MC68332GCFVV16 | 32-Bit Modular Microcontroller |
| MC68332GMFC16 | 32-Bit Modular Microcontroller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68332VFC16 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:32-Bit Modular Microcontroller |
| MC68332VFC20 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:32-Bit Modular Microcontroller |
| MC68332VFV16 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:32-Bit Modular Microcontroller |
| MC68332VFV20 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:32-Bit Modular Microcontroller |
| MC68334 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Technical Supplement |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。