
EC000 Core Processor
4-6
MC68307 USER’S MANUAL
MOTOROLA
4.4 EC000 CORE INSTRUCTION SET OVERVIEW
Design of the instruction set gives special emphasis to support of structured, high-level lan-
guages and to ease of assembly language programming. Each instruction, with a few excep-
tions, operates on bytes, words, and long words, and most instructions can use any of the
14 addressing modes. Over 1000 useful instructions are provided by combining instruction
types, data types, and addressing modes. These instructions include signed and unsigned
multiply and divide, “quick” arithmetic operations, BCD arithmetic, and expanded operations
(through traps). Additionally, the highly symmetric, proprietary microcoded structure of the
instruction set provides a sound, flexible base for the future.
The EC000 core instruction set is listed in 
Table 4-4. For detailed information on the EC000
core instruction set, refer to M68000PM/AD,
M68000 Family Programmer's Reference Man-
ual.
Stack Pointers
SP
Active Stack Pointer
SSP
Supervisor Stack Pointer
USP
User Stack Pointer
Miscellaneous
<ea>
Effective Address
<label>
Assemble Program Label
<list>
List of registers, for example D3–D0.
LB
Lower Bound
m
Bit m of an Operand
m–n
Bits m through n of Operand
UB
Upper Bound
Table 4-4. EC000 Core Instruction Set Summary
Opcode
Operation
Syntax
ABCD
BCD Source + BCD Destination + X
 Destination ABCD Dy,Dx
ABCD –(Ay),–(Ax)
ADD
Source + Destination
 Destination
ADD <ea>,Dn
ADD Dn,<ea>
ADDA
Source + Destination
 Destination
ADDA <ea>,An
ADDI
Immediate Data + Destination
 Destination
ADDI #<data>,<ea>
ADDQ
Immediate Data + Destination
 Destination
ADDQ #<data>,<ea>
ADDX
Source + Destination + X
 Destination
ADDX Dy,Dx
ADDX –(Ay),–(Ax)
AND
Source
Λ Destination  Destination
AND <ea>,Dn
AND Dn,<ea>
ANDI
Immediate Data
Λ Destination  Destination
ANDI #<data>,<ea>
ANDI to CCR
Source
Λ CCR  CCR
ANDI #<data>,CCR
ANDI to SR
If supervisor state
then Source
Λ SR  SR
else TRAP
ANDI #<data>,SR
ASL, ASR
Destination Shifted by count
 Destination
ASd Dx,Dy1
ASd #<data>,Dy1
ASd <ea>1
Bcc
If condition true
then PC + dn  PC
Bcc <label>
Table 4-3. Notation Conventions (Continued)