參數資料
型號： MC56F8347VPY60
廠商： MOTOROLA INC
元件分類： 數字信號處理
英文描述： 16-BIT, 120 MHz, OTHER DSP, PQFP160
封裝： LQFP-160
文件頁數： 74/160頁
文件大?。?/td> 2217K
代理商： MC56F8347VPY60
20
56F8347 Technical Data
Preliminary
WR
51
Output
Tri-stated
Write Enable — WR is asserted during external memory
write cycles. When WR is asserted low, pins D0 - D15
become outputs and the device puts data on the bus.
When WR is deasserted high, the external data is latched
inside the external device. When WR is asserted, it
qualifies the A0 - A16, PS, and DS pins. WR can be
connected directly to the WE pin of a static RAM.
Depending upon the state of the DRV bit in the EMI bus
control register (BCR), A0 - A23 and EMI control signals
are tri-stated when the external bus is inactive.
To deactivate the internal pull-up resistor, set the CTRL bit
in the SIM_PUDR register.
PS
(CS0)
(GPIOD8)
53
Output
Input/
Output
Tri-stated
Program Memory Select — This signal is actually CS0 in
the EMI, which is programmed at reset for compatibility
with the 56F80x PS signal. PS is asserted low for external
program memory access.
Depending upon the state of the DRV bit in the EMI bus
control register (BCR), A0 - A23 and EMI control signals
are tri-stated when the external bus is inactive.
Port D GPIO — This GPIO pin can be individually
programmed as an input or output pin.
CS0 resets to provide the PS function as defined on the
56F80x devices.
To deactivate the internal pull-up resistor, clear bit 8 in the
GPIOD_PUR register.
DS
(CS1)
(GPIOD9)
54
Output
Input/
Output
Tri-stated
Data Memory Select — This signal is actually CS1 in the
EMI, which is programmed at reset for compatibility with
the 56F80x DS signal. DS is asserted low for external data
memory access.
Depending upon the state of the DRV bit in the EMI bus
control register (BCR), A0 - A23 and EMI control signals
are tri-stated when the external bus is inactive.
Port D GPIO — This GPIO pin can be individually
programmed as an input or output pin.
To deactivate the internal pull-up resistor, clear bit 9 in the
GPIOD_PUR register.
Table 2-2 56F8347 Signal and Package Information for the 160-Pin LQFP
Signal Name
Pin No.
Type
State
During
Reset
Signal Description
相關PDF資料
PDF描述
MC56F8347MPY60 16-BIT, 120 MHz, OTHER DSP, PQFP160
MC56F8356MFV60 16-BIT, 120 MHz, OTHER DSP, PQFP144
MC56F8156VFVE 16-BIT, 120 MHz, OTHER DSP, PQFP144
MC56F8356MFVE 16-BIT, 120 MHz, OTHER DSP, PQFP144
MC56F8357MPY60 16-BIT, 120 MHz, OTHER DSP, PQFP160
相關代理商/技術參數
參數描述
MC56F8347VPYE 功能描述:數字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CNTRLR RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
MC56F8347VVF 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
MC56F8347VVFE 功能描述:IC DGTL SIGNAL CTLR 160-MAPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:56F8xxx 標準包裝:1 系列:87C 核心處理器:MCS 51 芯體尺寸:8-位 速度:16MHz 連通性:SIO 外圍設備:- 輸入/輸出數:32 程序存儲器容量:8KB（8K x 8） 程序存儲器類型:OTP EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4 V ~ 6 V 數據轉換器:- 振蕩器型:外部 工作溫度:0°C ~ 70°C 封裝/外殼:44-DIP 包裝:管件 其它名稱:864285
MC56F8355 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-Bit Digital Signal Controllers
MC56F8355MFG60 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Hybrid Controllers
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