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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | MC56F8256VLF |
| 寤犲晢锛� | Freescale Semiconductor |
| 鏂囦欢闋佹暩(sh霉)锛� | 11/88闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | DSC 64K FLASH 60MHZ 48-LQFP |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 250 |
| 绯诲垪锛� | 56F8xxx |
| 鏍稿績铏曠悊鍣細 | 56800E |
| 鑺珨灏哄锛� | 16-浣� |
| 閫熷害锛� | 60MHz |
| 閫ｉ€氭€э細 | CAN锛孖²C锛孡IN锛孲CI锛孲PI |
| 澶栧湇瑷�(sh猫)鍌欙細 | LVD锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 39 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 64KB锛�32K x 16锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | 闁冨瓨 |
| RAM 瀹归噺锛� | 4K x 16 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 3 V ~ 3.6 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 10x12b锛孌/A 1x12b |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 105°C |
| 灏佽/澶栨锛� | 48-LQFP |
| 鍖呰锛� | 绠′欢 |
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Signal/Connection Descriptions
MC56F825x/MC56F824x Digital Signal Controller, Rev. 3
Freescale Semiconductor
19
TMS
(GPIOD3)
43
47
63
input
Input/
Output
Input,
internal
pullup
enabled
Test Mode Select Input 鈥� This input pin is used to sequence the
JTAG TAP controller鈥檚 state machine. It is sampled on the rising
edge of TCK and has an on-chip pullup resistor.
Port D GPIO 鈥� This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is TMS
Note: Always tie the TMS pin to VDD through a 2.2K resistor if need
to keep on-board debug capability. Otherwise directly tie to VDD
RESET
(GPIOD4)
222
Input
Input/
Open-drain
Output
Input,
internal
pullup
enabled
Reset 鈥� This input is a direct hardware reset on the processor.
When RESET is asserted low, the device is initialized and placed in
the reset state. A Schmitt-trigger input is used for noise immunity.
The internal reset signal is deasserted synchronous with the
internal clocks after a fixed number of internal clocks.
Port D GPIO 鈥� This GPIO pin can be individually programmed as
an input or open-drain output pin.If RESET functionality is disabled
in this mode and the chip can be reset only via POR, COP reset, or
software reset.
After reset, the default state is RESET.
GPIOA0
(ANA0&
CMPA_P2)
(CMPC_O)
8
9
13
Input/
Output
Input
Output
Input,
internal
pullup
enabled
Port A GPIO 鈥� This GPIO pin can be individually programmed as
an input or output pin.
ANA0 and CMPA_P2 鈥� Analog input to channel 0 of ADCA and
positive input 2 of analog comparator A.
CMPC_O鈥� Analog comparator C output
When used as an analog input, the signal goes to the ANA0 and
CMPA_P2.
After reset, the default state is GPIOA0.
GPIOA1
(ANA1&
CMPA_M0)
9
10
14
Input/
Output
Input
Input,
internal
pullup
enabled
Port A GPIO 鈥� This GPIO pin can be individually programmed as
an input or output pin.
ANA1 and CMPA_M0 鈥� Analog input to channel 1of ADCA and
negative input 0 of analog comparator A.
When used as an analog input, the signal goes to the ANA1 and
CMPA_M0.
After reset, the default state is GPIOA1.
Table 5. MC56F825x/MC56F824x Signal and Package Information (continued)
Signal
Name
44
LQFP
48
LQFP
64
LQFP
Type
State
During
Reset
Signal Description
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| VI-25B-IY-B1 | CONVERTER MOD DC/DC 95V 50W |
| S9S08DZ32F1MLF | MCU 32K FLASH MASK AUTO 48-LQFP |
| S9S08DZ60F1CLC | MCU 60K FLASH AUTO 32-LQFP |
| DS21552GN | IC TXRX T1 1-CHIP 5V 100-BGA |
| VE-B7Y-IY-B1 | CONVERTER MOD DC/DC 3.3V 33W |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| MC56F8257 | 鍒堕€犲晢:FREESCALE 鍒堕€犲晢鍏ㄧū:Freescale Semiconductor, Inc 鍔熻兘鎻忚堪:Digital Signal Controller Battery chargers and management |
| MC56F8257MLH | 鍔熻兘鎻忚堪:鏁�(sh霉)瀛椾俊铏熻檿鐞嗗櫒鍜屾帶鍒跺櫒 - DSP, DSC DSC 64 LQFP 64K FL RoHS:鍚� 鍒堕€犲晢:Microchip Technology 鏍稿績:dsPIC 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:16 bit 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:2 KB 鏈€澶ф檪閻橀牷鐜�:40 MHz 鍙法绋嬭几鍏�/杓稿嚭绔暩(sh霉)閲�:35 瀹氭檪鍣ㄦ暩(sh霉)閲�:3 瑷�(sh猫)鍌欐瘡绉掑厗鎸囦护鏁�(sh霉):50 MIPs 宸ヤ綔闆绘簮闆诲:3.3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 灏佽 / 绠遍珨:TQFP-44 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| MC56F8257VLH | 鍔熻兘鎻忚堪:鏁�(sh霉)瀛椾俊铏熻檿鐞嗗櫒鍜屾帶鍒跺櫒 - DSP, DSC DSC 64 LQFP 64K FL RoHS:鍚� 鍒堕€犲晢:Microchip Technology 鏍稿績:dsPIC 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:16 bit 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:2 KB 鏈€澶ф檪閻橀牷鐜�:40 MHz 鍙法绋嬭几鍏�/杓稿嚭绔暩(sh霉)閲�:35 瀹氭檪鍣ㄦ暩(sh霉)閲�:3 瑷�(sh猫)鍌欐瘡绉掑厗鎸囦护鏁�(sh霉):50 MIPs 宸ヤ綔闆绘簮闆诲:3.3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 灏佽 / 绠遍珨:TQFP-44 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| MC56F825X | 鍒堕€犲晢:FREESCALE 鍒堕€犲晢鍏ㄧū:Freescale Semiconductor, Inc 鍔熻兘鎻忚堪:Digital Signal Controller Battery chargers and management |
| MC56F82723VFM | 鍒堕€犲晢:Freescale Semiconductor 鍔熻兘鎻忚堪:MC56F Series 100 MHz 32 KB Flash 3 KB SRAM 32-Bit Microcontroller - QFN-32 |
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