- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄181332 > MC33797 (飛思卡爾半導(dǎo)體(中國(guó))有限公司) Four Channel Squib Driver IC PDF資料下載
參數(shù)資料
| 型號(hào)： | MC33797 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國(guó))有限公司 |
| 英文描述： | Four Channel Squib Driver IC |
| 中文描述： | 四通道爆管驅(qū)動(dòng)IC |
| 文件頁(yè)數(shù)： | 22/32頁(yè) |
| 文件大?。?/td> | 639K |
| 代理商： | MC33797 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)當(dāng)前第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)
Analog Integrated Circuit Device Data
Freescale Semiconductor
29
33797
FUNCTIONAL DESCRIPTION
PROTECTION AND DIAGNOSIS FEATURES
Example of current limit conditions:
RR_LIMIT_X =10 k, IHS=A ± A
The high-side driver controls the current through the squib.
The current limit for the low-side driver is only to protect the
low-side driver stage from excessive current in the event of a
short to battery.
With RR_LIMIT_X conditions <4.32 k or shorted to ground,
the current limit will default to the RR_LIMIT_X = 10 k current
limit, not to exceed. With RR_LIMIT_X resistance value >60 k
or open, the current limit will default to the RR_LIMIT_X =
10
k
maximum current limit.
FET DRIVER CURRENT LIMIT MEASUREMENT
($7X COMMAND)
This function measures the firing current in each squib line
and records the “ON” time in which the IMEAS is above the
threshold for each squib. (Refer to Dynamic Electrical
Characteristics table, page 12.) The timing registers can be
reset via SPI command so additional current measurements
can be made.
An 8-bit message will be used to determine 255 time
steps. The driver current limit measurement is activated when
each individual high-side driver is activated. Each time the
squib current is measured above the IMEAS threshold during
the timer activation, a status bit will be set to “1”. If the current
measured is not above the IMEAS threshold during the timer
activation, the timing data log bit will not increment. Each
squib timing register can be reset via SPI command so
additional current measurements can be made. Initial squib
IC power-up will reset the timing registers (i.e., “Power-ON
Reset”). When reset, the current limit measurement register
byte will be set to $00.
Command $79 will indicate the status of the current limit
measurement comparator. The current limit measurement
from the test is captured and loaded into the register on the
next valid SPI command. When the firing current is above
IMEAS, the current limit is activated and the status bit will be
set to “1”. If the firing current is below IMEAS, the current limit
status bit will be set to “0”.
FET DRIVER CURRENT LIMIT MEASUREMENT
RESET COMMAND ($3X COMMAND)
The current limit status registers can be individually reset
with the command set found in Table 8. When the register bit
is set to “1” for squib X, the current measurement register will
be reset to $00.
SQUIB DRIVER THERMAL SHUTDOWN
($7F COMMAND)
With a nominal squib load, the FET squib driver will not
enter thermal shutdown until the driver has been active for a
minimum of 2.09 ms. The individual squib driver thermal
shutdown will not affect other squib drivers firing “ON” times.
With a shorted squib load, the FET squib driver will not
enter thermal shutdown until the driver has been active for a
minimum of 2.090 ms. For the shorted squib load, the
associated FET squib driver may enter thermal shutdown
with an “ON” time of 2.09 ms
≤ tON ≤ 2.82 ms.
When the thermal shutdown limit is exceeded, the thermal
status will be set to “1”. The thermal shutdown status ($7F)
diagnostics latch the thermal bit status when executed. The
Squib Driver Thermal shutdown status latch will be cleared
after the information is transmitted on the next valid SPI
command (i.e., TX: NOP or next $7F, latch cleared on rising
edge of chip select).
The FET squib driver can be activated through the arm/fire
command when the TEMPRENABLE (MIN) is reached (thermal
shutdown status “0”).
VTRANTSTX, HIGH- AND LOW-SIDE SQUIB DRIVER
FET TEST and STATUS ($82 TO $83 COMMAND)
This function checks the squib driver FET transistor status.
The high- and low-side squib driver FET test requires
FEN_1 and FEN_2 terminals to be low and two separate 8-
bit write commands to be made to the shift register. With the
FEN_1 and FEN_2 terminals status LOW, the first write is to
unlock in preparation of receiving the diagnostic command
for testing the high- and low-side squib drivers. The unlock
command ($82 and $83) is an “AND” function with the FEN_1
and FEN_2 BAR. All transistor test unlock commands ($82
and $83) will be echoed back on the SPI Data output.
The high- or low-side squib driver FET test will be aborted
if firing from any FET is enabled.
During the first write (unlock command), all diagnostic
functions are cleared. After the second write is completed, all
other diagnostic functions are made available again.
Squib 1A, squib 1B, squib 2A, and squib 2B high-side
squib drivers will be activated and diagnosed by the $82
followed by $1X diagnostic command (refer to Table 8,
page 24). A load from the SQB_HI_XX terminal to the
SENSE_XX terminal is required for the high-side squib driver
to be tested.
Squib 1A, squib 1B, squib 2A, and squib 2B low-side
squib drivers will be activated and diagnosed by the $83
followed by $2X diagnostic command (Table 8).
When enabled the high- or low-side FET driver will be
enabled and current limited to a nominal current limit of
10 mA. The high- and low-side driver test time is not
automated and is controlled through SPI.
When either a $82 or a $83 command is issued, the
previous transistor test will stop to prevent coinciding high-
and low-side FET drive transistors from turning “ON”. This
prevents high- and low-side drivers from being activated
simultaneously.
Note The high- or low-side squib driver test is capable of
checking a code sequence, allowing any combination of high-
or low-side drivers to be tested.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC44C402 | MTS Stereo Encoder |
| MC44C402AC | MTS Stereo Encoder |
| MC44C402ACR2 | MTS Stereo Encoder |
| MC54HCT174AJ | HCT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CDIP16 |
| MC56F8367MPY60 | 16-BIT, 120 MHz, OTHER DSP, PQFP160 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC33797BPEW | 功能描述:功率驅(qū)動(dòng)器IC Four Channel Squib Dr RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類(lèi)型:Low Cost High or Low Side MOSFET Driver 上升時(shí)間: 下降時(shí)間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
| MC33797BPEWR2 | 功能描述:功率驅(qū)動(dòng)器IC Four Channel Squib Dr RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類(lèi)型:Low Cost High or Low Side MOSFET Driver 上升時(shí)間: 下降時(shí)間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
| MC33813AE | 功能描述:功率驅(qū)動(dòng)器IC 1 CYL SM ENG CONTROL IC RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類(lèi)型:Low Cost High or Low Side MOSFET Driver 上升時(shí)間: 下降時(shí)間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
| MC33813AER2 | 功能描述:功率驅(qū)動(dòng)器IC 1 CYL SM ENG CONTROL IC RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類(lèi)型:Low Cost High or Low Side MOSFET Driver 上升時(shí)間: 下降時(shí)間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
| MC33814AE | 功能描述:功率驅(qū)動(dòng)器IC 2 CYL SM ENG CONTROL IC RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類(lèi)型:Low Cost High or Low Side MOSFET Driver 上升時(shí)間: 下降時(shí)間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。