參數(shù)資料
型號(hào)： MC33291L
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： Eight Output Switch with Serial Peripheral Interface I/O(帶SPI接口的八輸出開(kāi)關(guān))
中文描述： 8個(gè)串行外圍接口的I / O（帶的SPI接口的八輸出開(kāi)關(guān)輸出開(kāi)關(guān)）
文件頁(yè)數(shù)： 19/24頁(yè)
文件大?。?/td> 633K
代理商： MC33291L
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33291L
19
An Output OFF Open Load Fault is indicates when the output
voltage is less than the Output Threshold Voltage (V
Thres
) of 0.6
to 0.8 x V
DD
. Since the 33291L outputs function as switches,
during normal operation, each MOSFET output should either be
completely turned ON or OFF. By design, the threshold voltage
was selected to be between the ON and OFF voltage of the
MOSFET. During normal operation, the ON state V
DS
voltage of
the MOSFET is less than the threshold voltage and the OFF
state V
DS
voltage is greater than the threshold voltage. This
design approach provides using the same threshold
comparator for Output Open Load Detect in the OFF state and
Short Circuit Detect in the ON state. See Figure 18 for an
understanding of the Short Circuit Detect circuit. With
V
DD
= 5.0 V, an OFF state output voltage of less than 3.0 V will
be detected as an Output OFF Open Load Fault while voltages
greater than 4.0 V will not be detected as a fault.
The 33291L has an internal pull-down current source of
50 μA, illustrated in Figure 17 between the MOSFET drain and
ground. This current source prevents the output from floating up
to V
PWR
if there is an open load or internal wire bond failure. The
internal comparator compares the drain voltage with a
reference voltage, V
Thres
(0.6 to 0.8 x V
DD
). If the output voltage
is less than this reference voltage, the 33291L will declare the
condition to be an open load fault.
During steady-state operation, the minimum load resistance
(R
L
) required to prevent false fault reporting during normal
operation can be located using the following equation:
Therefore, the load resistance necessary to prevent false open
load fault reporting is (using Ohm’s Law) equal to 92 k
or less
.
During output switching, especially with capacitive loads, a
false output OFF Open Load Fault may be triggered. To prevent
this false fault from being reported an internal fault filter in the
range of 25 to 100 μs is incorporated. The duration in which a
false fault may be reported is a function of the load impedance
(R
L
,C
L
,L
L
), R
DS(on)
, and C
OUT
of the MOSFET as well as the
supply voltage (V
PWR
). The rising edge of CS triggers a built-in
fault delay timer which must time-out (25 or 100 μs) before the
fault comparator is enabled to detect at faulted threshold. The
circuit automatically returns to normal operation once the
condition causing the Open Load Fault is removed.
Shorted Load Fault
A short load, or over current fault can be caused by any
output being shorted directly to supply, or an output
experiencing a current greater than the current limit.
There are three safety circuits progressively in operation
during load short conditions providing system protection. They
are:
1. The output current of the device is monitored in an
analog fashion using a SENSEFET
approach and
current limited.
2. The output current of the device is sensed by monitoring
the MOSFET drain voltage.
3. The output thermal limit of the device is sensed, and
when attained, causes only the specific faulted output to
be latched OFF, allowing all remaining outputs to operate
normally.
Each of the three protection mechanisms are incorporated in
their output providing robust independent output operation.
The analog current limit circuit is always active, monitoring
the output drain current. An over current condition causes the
gate control circuitry to reduce the gate-to-source voltage
imposed on the output MOSFET, re-establishing the load
current in compliance with current limit (1.0 to 3.0 A) range.
Time required for the current limit circuitry to act is less than
20 μs. Therefore, currents higher than 1.0 to 3.0 A will never be
seen for more than 20 μs (a typical duration is 10 μs). If the
current of an output attempts to exceed the predetermined limit
of 1.0 to 3.0 A (2.0 A nominal), the V
DS
voltage will exceed the
V
Thres
voltage and the over current comparator will be tripped,
illustrated in Figure 18.
Figure 18. Short Circuit Detect and
Analog Current Limiting Circuit
The status of SFPD determines whether the 33291L will shut
down immediately, or continue to operate in an analog current
limited mode until either the short circuit (over current) condition
is removed or thermal shutdown is reached.
Grounding the SFPD pin enables the short fault protection
shutdown circuitry. Consider a load short (output short to
supply) occurring on an output before, during, and after output
turn ON. When the CS signal rises to the high logic state, the
corresponding output is turned ON, activating a delay timer.
The duration of the delay timer is 70 to 250 μs. If the short circuit
takes place before the output is turned ON, the delay
experienced is the entire 70 μs to 250 μs followed by shutdown.
If the short occurs during the delay time, the shutdown still
occurs after the delay time has elapsed. However, if the short
circuit occurs after the delay time, shutdown is immediate
(within 20 μs after sensing). The purpose of the delay timer is to
prevent
false
faults from being reported when switching
capacitive loads.
V
Thres
2.5 to 3.5 V
+
High = Fault
Output
V
PWR
R
L
33291L
+
–
MOSFET ON
Digital
Analog
V
ref
F
Freescale Semiconductor, Inc.
Go to: www.freescale.com
n
.
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