參數(shù)資料
型號: MC14LC5482
廠商: Motorola, Inc.
元件分類: Codec
英文描述: PCM Codec-Filter(PCM 編解碼-濾波器)
中文描述: PCM編解碼器,過濾器(的PCM編解碼-濾波器)
文件頁數(shù): 7/16頁
文件大?。?/td> 313K
代理商: MC14LC5482
MC14LC5480EVK
MOTOROLA
7
Figure 2–2. S1 Settings for Transcoding Rates
NOTE
For above settings to be valid, it is important to have the J2A jumper populated.
This sets the FSYNC at 8 kHz. Populating J2B sets the FSYNC at 16 kHz, which
is used exclusively for the MC145482 13–Bit Linear PCM Codec–Filter.
BCLK
Bit Clock (BCLK) is routed through J19A (BCLKR) and J8 (BCLKT). When these jumpers
are populated, BCLK is presented to the 2x20 connector (P13), Pin 36 (BCLKR), and Pin 5
(BCLKT).
J1 allows the user to select the frequency at which BLCK operates. The jumper–selectable
frequencies are 4.096 MHz, 2.048 MHz, 1.024 MHz, 512 kHz, 128 kHz, and 64 kHz.
256 kHz
256 kHz is presented to J7A as a possible frequency setting for the master clock (MCLK)
input on the chosen PCM Codec–Filter. J7B will configure the MCLK input to have a fre-
quency equal to BCLK.
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