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參數(shù)資料
| 型號： | MC145740F |
| 廠商： | MOTOROLA INC |
| 元件分類： | 信令電路 |
| 英文描述： | Dual Tone Multiple Frequency Line Interface |
| 中文描述： | TELECOM, DTMF SIGNALING CIRCUIT, PDSO20 |
| 封裝： | SOG-20 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大小： | 141K |
| 代理商： | MC145740F |
MC145740
6
MOTOROLA
Figure 4. Serial Interface Timing
NOTES:
1. The data in front of the EN signal will be latched.
2. The latched data will be repeated until there is an EN pulse.
3. The detected data will be updated with the next EN pulse.
4. After the R/W pin becomes inactive, the data will be lost.
5. D1 corresponds to CLK1.
6. The EN and CLK signals need to be set at the logic low level when the R/W signal changes.
7. The CLK signal must be held low when the EN signal is high.
T3
A3
CD1
1
2
3
4
1
2
3
6
STATUS REGISTER
CONTROL REGISTER
(NOTE 1)
(NOTE 6)
8
7
5
4
7
10
EN
CLK
DATA
R/W
D0
D0
1
2
3
0
1
2
3
(NOTE 6)
12
17
13
4
EN
CLK
DATA
R/W
D1
D2
D3
1
2
1
D1
D2
D0
18
D1
4
5
5
(NOTE 3)
14
15
16
11
(NOTE 4)
HIGH IMPEDANCE
(NOTE 2)
1
(NOTE 5)
T2
A2
CD0
T1
A1
SQ
T0
A0
M2
M1
M0
(LSB CLOCK)
5
6
7
8
9
10
11
12
13
14
9
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