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參數(shù)資料
| 型號： | MC14572UBF |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | Hex Gate |
| 中文描述： | 4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, PDSO16 |
| 封裝： | PLASTIC, EIAJ, SOP-16 |
| 文件頁數(shù)： | 4/5頁 |
| 文件大?。?/td> | 158K |
| 代理商： | MC14572UBF |
MOTOROLA CMOS LOGIC DATA
MC14572UB
4
OUTLINE DIMENSIONS
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
–A–
B
F
C
S
H
G
D
J
L
M
16 PL
0.25 (0.010)
SEATING
PLANE
1
8
9
16
K
–T–
M
A
M
T
DIM
A
B
C
D
F
G
H
J
K
L
M
S
MIN
0.740
0.250
0.145
0.015
0.040
0.100 BSC
0.050 BSC
0.008
0.110
0.295
0
0.020
MAX
0.770
0.270
0.175
0.021
0.70
MIN
18.80
6.35
3.69
0.39
1.02
MAX
19.55
6.85
4.44
0.53
1.77
MILLIMETERS
INCHES
2.54 BSC
1.27 BSC
0.21
2.80
7.50
0
0.51
0.015
0.130
0.305
10
0.040
0.38
3.30
7.74
10
1.01
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620–10
ISSUE V
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
–A–
–B–
–T–
SEATING
F
E
G
N
K
C
16 PL
D
S
A
M
0.25 (0.010)
T
16 PL
0.25 (0.010)
J
S
B
M
T
M
L
DIM
A
B
C
D
E
F
G
H
K
L
M
N
MIN
0.750
0.240
–––
0.015
0.050 BSC
0.055
0.100 BSC
0.008
0.125
0.300 BSC
0
0.020
MAX
0.785
0.295
0.200
0.020
MIN
19.05
6.10
–––
0.39
MAX
19.93
7.49
5.08
0.50
MILLIMETERS
INCHES
1.27 BSC
1.40
2.54 BSC
0.21
3.18
7.62 BSC
0
0.51
0.065
1.65
0.015
0.170
0.38
4.31
15
0.040
15
1.01
16
9
1
8
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