MC145423
TELECOMMUNICATIONS
4
* The slave’s crystal frequency divided by 512 (UDLT-1) or 1024 (UDLT-2), must equal the master’s MSI frequency ±0.25% for optimum
operation.
ABSOLUTE MAXIMUM RATINGS (Voltage Referenced to VSS)
Rating
Symbol
Value
Unit
DC Supply Voltage
VDD – VSS
–0.5 to 6
V
Voltage, Any Pin to VSS
V
–0.5 to VDD + 0.5
V
DC Current, Any Pin (Excluding
VDD, VSS)
I±10
mA
Operating Temperature
TA
–40 to 85
°C
Storage Temperature
Tstg
–85 to 150
°C
RECOMMENDED OPERATING CONDITIONS (TA = –40° to 85°C)
Parameter
Pins
Min
Typ
Max
Unit
DC Supply Voltage
VDD
4.5
—
5.5
V
Power Dissipation (PD = VDD)VDD = 5 V
VDD
——
80
mW
Power Dissipation (PD = VSS)VDD = 5 V
VDD
——
80
mW
Frame Rate
MSI
7.9
8.0
8.1
kHz
CCI CLK Frequency (MSI = 8 kHz)
UDLT-1 (CCI = 256 x MSI)
UDLT-2
CCI
—
2.048
8.192
—
8.29
MHz
Frame Rate Slip*
—
0.25
%
Data Clock Rate (Master Mode)
UDLT-1
UDLT-2
TDC-RDC
64
128
—
4100
kHz
SDCLK (UDLT-2 Only)
16
—
4100
kHz
Modulation Baud Rate
UDLT-1
UDLT-2
LO1, LO2
—
256
512
kHz
This device contains circuitry to protect
the inputs against damage due to high static
voltages or electric fields; however, it is
advised that normal precautions be taken
to avoid applications of any voltage higher
than maximum rated voltages to this high-
impedance circuit. For proper operation, it
is recommended that Vin and Vout be
constrained to the range VSS ≤ (Vin or Vout)
≤ VDD. Reliability of operation is enhanced
if unused inputs are tied to an appropriate
logic level (e.g., either VSS or VDD).
This document contains information on a product under development. Motorola
reserves the right to change or discontinue this product without notice.
Motorola, Inc., 2000. All rights reserved.
Semiconductor Products Sector
MOTOROLA
Order Number: MC145423/D
Rev. 0, 8/24/00
DW SUFFIX
SOIC
CASE 751F
DT SUFFIX
TSSOP
CASE 1168
ORDERING INFORMATION
MC145423DW
SOIC Package
MC145423DT
TSSOP Package
Product Preview
Universal Digital Loop
Transceiver (UDLT-3)
Pin Selectable Master/Slave
Limited Distance Modem
The MC145423 is a CMOS integrated circuit designed to be one
of the major building blocks in digital subscriber voice/data
telephone systems and remote data acquisition and control systems.
The UDLT-3 incorporates into one device, all the functionality of
the MC145421 (ISDN UDLT-2 master), MC145425 (ISDN UDLT-2
slave), MC145422 (UDLT-1 master), and MC145426 (UDLT-1
slave).
Since these modes/functions are pin selectable, the MC145423
can be used in telephone switch line cards, as well as remote digital
telsets or data terminals.
VDD = 4.5 V to 5.5 V
28-Pin SOIC and TSSOP Packages
Protocol Independent
Pin Controlled Power-Down
LI Sensitivity Control in Master Mode
2.048 MHz Output in Slave Mode
UDLT-2 Features
Synchronous Full Duplex 160 kbps Voice and Data
Communications in a 2B+2D Format for ISDN Compatibility
Provides CCITT Basic Access Data Transfer Rate (2B+D) for
ISDNs on a Single Twisted Pair Up to 1 km on 26 AWG or
Larger Cable
UDLT-1 Features
Pin Controlled Loopback
Automatic Power-Up/Down (Slave)
Full Duplex Synchronous 64 kbps Voice/Data Channel and Two
8 kbps Signaling Data Channels Over One 26 AWG Wire Pair Up
to 2 km
MC145423
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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