參數(shù)資料
型號(hào)： MC145192
廠商： Motorola, Inc.
英文描述： Low-Voltage 1.1 GHz PLL Frequency Synthesizer
中文描述： 低電壓1.1 GHz PLL頻率合成器
文件頁(yè)數(shù)： 3/24頁(yè)
文件大?。?/td> 348K
代理商： MC145192
MC145192
MOTOROLA
3
ELECTRICAL CHARACTERISTICS
(VDD = VCC = 2.7 to 5.0 V, Voltages Referenced to GND, TA = – 40
°
to 85
°
C, unless otherwise
stated; Phase/Frequency Detector A VPD = 4.5 to 5.5 V with VDD
≤
VPD; Phase/Frequency Detector B VPD = 2.7 to 5.5 V with VDD
≤
VPD)
Symbol
Parameter
Test Condition
Guaranteed
Limit
Unit
VIL
Maximum Low–Level Input Voltage
(Data In, Clock, Enable, REFin)
Device in Reference Mode, DC Coupled
0.2 x VDD
V
VIH
Minimum High–Level Input Voltage
(Data In, Clock, Enable, REFin)
Device in Reference Mode, DC Coupled
0.8 x VDD
V
VHys
Minimum Hysteresis Voltage
(Clock, Enable)
VDD = 2.7 V
VDD = 5.0 V
100
300
mV
VOL
Maximum Low–Level Output Voltage
(REFout, Output A)
Iout = 20
μ
A, Device in Reference Mode
0.1
V
VOH
Minimum High–Level Output Voltage
(REFout, Output A)
Iout = – 20
μ
A, Device in Reference Mode
VDD – 0.1
V
IOL
Minimum Low–Level Output Current
(REFout, LD)
Vout = 0.4 V
0.25
mA
IOL
Minimum Low–Level Output Current
(
φ
R,
φ
V)
Vout = 0.4 V
VDD, VPD = 2.7 V
0.36
mA
IOL
Minimum Low–Level Output Current
(Output A)
Vout = 0.4 V
0.6
mA
IOL
Minimum Low–Level Output Current
(Output B)
Vout = 0.4 V
1.0
mA
IOH
Minimum High–Level Output Current
(REFout, LD)
Vout = VDD – 0.4 V
– 0.25
mA
IOH
Minimum High–Level Output Current
(
φ
R,
φ
V)
Vout = VPD – 0.4 V
VDD, VPD = 2.7 V
– 0.36
mA
IOH
Minimum High–Level Output Current
(Output A Only)
Vout = VDD – 0.4 V
–
0.35
mA
Iin
Maximum Input Leakage Current
(Data In, Clock, Enable, REFin)
Vin = VDD or GND, Device in XTAL Mode
±
1.0
μ
A
Iin
Maximum Input Current
(REFin)
Vin = VDD or GND, Device in Reference Mode
±
150
μ
A
IOZ
Maximum Output Leakage Current
(PDout)
Vout = VPD – 0.5 V or 0.5 V, Output in High–Impedance
State
±
200
nA
(Output B)
Output in High–Impedance State
±
10
μ
A
ISTBY
Maximum Standby Supply Current
(VDD + VPD Pins)
Vin = VDD or GND; Outputs Open; Device in Standby
Mode, Shut–Down Crystal Mode or REFout–Static–Low
Reference Mode; Output B Controlling VCC per Figure 22
30
μ
A
IPD
Maximum Phase Detector
Quiescent Current (VPD Pin)
Bit C6 = High Which Selects Phase Detector A,
PDout = Open, PDout = Static Low or High, Bit C4 = Low
Which is NOT Standby, IRx = 113
μ
A, VPD = 5.5 V
Bit C6 = Low Which Selects Phase Detector B,
φ
R and
φ
V = Open,
φ
R and
φ
V = Static Low or High, Bit
C4 = Low Which is NOT Standby
600
μ
A
30
IT
Total Operating Supply Current
(VDD + VPD + VCC Pins)
fin = 1.1 GHz; REFin = 13 MHz @ 1 V p–p;
Output A = Inactive and No Connect; VDD = VCC,
REFout,
φ
V,
φ
R, PDout, LD = No Connect;
Data In, Enable, Clock = VDD or GND, Phase Detector A
Off
*
mA
* The nominal values are:
6 mA at VDD = 2.7 V and VPD = 2.7 V
9 mA at VDD = 5.0 V and VPD = 5.5 V
These are not guaranteed limits.
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