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參數(shù)資料
| 型號： | MC145159P1 |
| 廠商： | MOTOROLA INC |
| 元件分類： | XO, clock |
| 英文描述： | Serial-Input PLL Frequency Synthesizer with Aanalog Phase Detector |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, PDIP20 |
| 封裝： | PLASTIC, DIP-20 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 223K |
| 代理商： | MC145159P1 |
MC145159–1
2
MOTOROLA
BLOCK DIAGRAM
* FSO is not and cannot be used as a digital phase detector output.
′
′
!#"
!#"
÷
÷
÷
!#"
MAXIMUM RATINGS*
(Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
VDD
Vin, Vout
Iin, Iout
DC Supply Voltage
– 0.5 to + 10
V
Input or Output Voltage (DC or Transient)
– 0.5 to VDD + 0.5
±
10
V
Input or Output Current (DC or Transient),
per Pin
mA
IDD, ISS
PD
Tstg
TL
* Maximum Ratings are those values beyond which damage to the device may occur.
Supply Current, VDD or VSS Pins
Power Dissipation, per Package
±
30
mA
500
mW
Storage Temperature
– 65 to + 150
°
C
Lead Temperature (8–Second Soldering)
260
°
C
This device contains circuitry to protect the
inputs against damage due to high static volt-
ages or electric fields; however, it is advised that
normal precautions be taken to avoid applica-
tions of any voltage higher than maximum rated
voltages to this high–impedance circuit. For
proper operation it is recommended that Vin and
Vout be constrained to the range VSS
≤
(Vin or
Vout)
≤
VDD.
Unused inputs must always be tied to an
appropriate logic voltage level (e.g., either VSS
or VDD).
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