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參數(shù)資料
| 型號(hào)： | MC14012UBCL |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | UB-Suffix Series COMS Gates |
| 中文描述： | 4000/14000/40000 SERIES, DUAL 4-INPUT NAND GATE, CDIP14 |
| 封裝： | CERAMIC, DIP-14 |
| 文件頁(yè)數(shù)： | 3/7頁(yè) |
| 文件大?。?/td> | 321K |
| 代理商： | MC14012UBCL |
MOTOROLA CMOS LOGIC DATA
MC14001UB
20
VDD
10
—
0.05
—
0
0.05
—
0.05
Vin = 0 or VDD
“1” Level
5.0
15
4.95
14.95
—
—
4.95
14.95
5.0
15
—
—
4.95
14.95
—
—
Vdc
Input Voltage
(VO = 13.5 Vdc)
(VO = 0.5 Vdc)
VOH
“0” Level
15
—
2.5
—
6.75
2.5
—
2.5
Vdc
“1” Level
IIH
5.0
4.0
—
4.0
2.75
—
4.0
—
Vdc
(VOH = 2.5 Vdc)
(VOH = 13.5 Vdc)
Source
5.0
15
– 1.2
– 1.8
—
—
– 1.0
– 1.5
– 1.7
– 3.5
—
—
– 0.7
– 1.1
—
—
(VOL = 0.4 Vdc)
Sink
IOL
5.0
10
0.64
1.6
—
—
0.51
1.3
0.88
2.25
—
—
0.36
0.9
—
—
mAdc
(Vin = 0)
Quiescent Current
IDD
5.0
10
—
0.25
—
0.0005
0.25
—
7.5
μ
Adc
(Dynamic plus Quiescent,
**The formulas given are for the typical characteristics only at 25 C.
To calculate total supply current at loads other than 50 pF:
IT(CL) = IT(50 pF) + (CL – 50) Vfk
where: IT is in
μ
H (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.001 x the number of exercised gates per
package.
10
IT = (0.6
μ
A/kHz) f + IDD/N
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