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參數(shù)資料
| 型號(hào)： | MC13181 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 電源管理 |
| 英文描述： | Wireless Power Management Integrated Circuit |
| 中文描述： | 2-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC24 |
| 封裝： | PLASTIC, QFN-24 |
| 文件頁數(shù)： | 13/18頁 |
| 文件大小： | 211K |
| 代理商： | MC13181 |
Circuit Features
MOTOROLA
MC13181
Advance Information
13
3 Circuit Features
3.1 Low Drop Out Regulators (LDO)
All three regulators are designed for use with low-value, low-cost bypass capacitors. Low ESR tantalum
capacitors are recommended (high performance ceramic capacitors with extremely low ESR, 1
, should
be avoided at regulator outputs to ensure stability, see Table 4 (Electrical Characteristics) for allowable
ESR range for each regulator). The output capacitors should be 1.0
μ
F minimum and should be mounted
close to the IC. Better transient performance can be achieved with a larger output capacitor. In general
turn-on and turn-off time will increase in proportion to the capacitor value. the regulators may not meet
specified turn-on time with a larger capacitor.
Additional filter capacitors should be placed across each V
CC
input. A 0.1
μ
F ceramic close to the IC and a
1.0
μ
F tantalum (placement is less critical) are recommended.
All three regulators are designed for high Power Supply Rejection Ratio, low standby current, good line
and load regulation, and fast turn on.
The first regulator, LDO_1.85, supplies 1.85V. It is capable of a nominal output current of 30 mA. This
regulator is ideal for powering low-voltage digital or baseband circuitry.
The second regulator, LDO_2.65, supplies 2.65 V at up to 65 mA. This regulator is intended to supply
power for RF/IF circuitry. This regulator is optimized for slightly better close-in PSRR performance, and
derives its power from the VCC1 input pin. The input to the MC13180, which this LDC supplies current,
requires at least 2.55 V. The additional voltage of LDO_2.65 allows for a series resistor, shunt capacitor
filter into incorporate to further improve PSRR on that line. The resistor must be 0.220
minimum, and
the capacitor 1.0 to 2.2 μF. The maximum resistor value should be chosen so that maximum current will
result in a voltage drop of 0.1 V or less.
The third regulator, LDO_3.0/3.3, can be set to either 3.0 V out to 3.3 V out through a single select line.
This output can source 60 mA. This regulator can be used to supply USB power or power an audio
CODEC or some other peripheral as needed. If the input voltage drops below the overhead needed for
regulation, the output of this regulator will track the input down to 2.7 V.
The LDO_1.85 and LDO_3.0/3.3 regulators derive their power from the VCC2 input pin. This allows
filtering to be tailored for the load circuitry, and to isolate the noisy digital (1.85 V) peripheral (3.0/3.3 V)
from the RF (2.65 V) and reference of the IC.
Each regulator has an independent, active-high enable line. This line can accept a “high” (to turn on the
regulator) input of 1.5 V up to either V
CC
, and can be tied directly to V
CC
if the enable function is not to be
used (shutdown will still function). If a given regulator is not needed in the application, the appropriate
enable input can be tied low (<1.5 V) and the output capacitor eliminated. Care should be taken if the
enable pin is to be driven from a processor powered by the corresponding regulator.
Table 6.
LDO Regulators
LDO
Voltage
(V)
Current
(mA)
SEL
C
out
(
μ
F)
LDO_1.85
1.85
30
-
1.0
LDO_2.65
2.65
65
-
1.0
LDO_3.0/3.3
3.0
60
high
1.0
LDO_3.0/3.3
3.3
60
low
1.0
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