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參數(shù)資料
| 型號(hào)： | MC12U064DACA-2QC00 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Dual Voltage MultiMediaCard Specification |
| 中文描述： | 雙電壓多媒體卡規(guī)格 |
| 文件頁數(shù)： | 40/64頁 |
| 文件大小： | 1385K |
| 代理商： | MC12U064DACA-2QC00 |
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MultiMediaCard
TM
attempt to unlock an unlocked card will fail and LOCK_UNLOCK_FAILED error bit will be set in the
status register.
*
Forcing Erase:
In case that the user forgot the password (the PWD content) it is possible to erase all the card data
content along with the PWD content. This operation is called Forced Erase.
- Select a card (CMD7), if not previously selected already.
- Define the block length (CMD16) to 1 byte (8bit card lock/unlock command). Send the card
lock/unlock command with the appropriate data block of one byte on the data line including 16 bit
CRC. The data block shall indicate the mode ERASE (the ERASE bit shall be the only bit set).
If the ERASE bit is not the only bit in the data field then the LOCK_UNLOCK_FAILED error bit will be
set in the status register and the erase request is rejected. If the command was accepted then ALL
THE CARD CONTENT WILL BE ERASED including the PWD and PWD_LEN register content and
the locked card will get unlocked. An attempt to force erase on an unlocked card will fail and
LOCK_UNLOCK_FAILED error bit will be set in the status register.
*
State transition summary
Table “Card State Transition Table” defines the card state transitions as a function of received
command
4.9.6 Responses
All responses are sent via command line (CMD), all data starts with the MSB.
Table 4-10 Format R1(Response Command)
0
0
bit5 … bit0
Bit31 … bit0
start bit
card
command
status
The contents of the status field are described in Chapter “Status
Format R1b (response command with busy signal):
R1b
is identical to R1 with an optional busy signal transmitted on the data line. The card may become
busy after receiving these commands based on its state prior to the command reception
Format R2 (CID, CSD register):
response length 136 bits.
Note: Bit 127 down to bit 1 of CID and CSD are transferred, the reserved bit [0] is replaced by the end
bit
Table 4-11 Format R2(CID, CSD Register) : Response Length 136 bits
0
0
bit5 … bit0
start bit
card
reserved
Bit6 … bit0
CRC
1
end bit
Bit127 … bit1
CID
or CSD
including internal CRC
1
end bit
register
Format R3 (OCR):
response length 48 bits.
40
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| MC12U128DACA-2QC00 | Dual Voltage MultiMediaCard Specification |
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相關(guān)代理商/技術(shù)參數(shù) |
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| MC12U064HACA | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:MultiMediaCard Specification |
| MC12U064HACA-0QC00 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:MultiMediaCard Specification |
| MC12U064HACB-0QC00 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:MultiMediaCard Specification |
| MC12U064HACC-0QC00 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:MultiMediaCard Specification |
| MC12U064HAFA-0QC00 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:MultiMediaCard Specification |
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