參數(shù)資料
型號(hào)： MC12210DT
廠(chǎng)商： MOTOROLA INC
元件分類(lèi)： XO, clock
英文描述： MECL PLL COMPONENTS SERIAL PLL FREQUENCY SYNTIESIZER
中文描述： PLL FREQUENCY SYNTHESIZER, 2500 MHz, PDSO20
封裝： PLASTIC, TSSOP-20
文件頁(yè)數(shù)： 9/12頁(yè)
文件大?。?/td> 142K
代理商： MC12210DT
MC12210
9
MOTOROLA RF/IF DEVICE DATA
ELECTRICAL CHARACTERISTICS
(VCC = 2.7 to 5.5 V; TA = –40 to +85
°
C, unless otherwise noted.)
Parameter
Symbol
Min
Typ
Max
Unit
Condition
Supply Current for VCC
ICC
–
8.8
13.0
mA
Note 1
–
10.2
16.0
Note 2
Supply Current for VP
IP
–
0.7
1.1
mA
Note 3
–
0.8
1.3
Note 4
Operating Frequency
fINmax
fINmin
FIN
2500
–
–
–
–
500
MHz
Note 5
Operating Frequency (OSCin)
FOSC
–
12
20
MHz
Crystal Mode
–
–
40
MHz
External Reference Mode
Input Sensitivity
fIN
VIN
VOSC
VIH
VIL
IIH
IIL
IOSC
200
–
1000
mVpp
OSCin
500
–
2200
mVpp
Input HIGH Voltage
CLK, DATA, LE, FC
0.7 VCC
–
–
–
V
Input LOW Voltage
CLK, DATA, LE, FC
–
0.3 VCC
2.0
V
VCC = 5.5 V
VCC = 5.5 V
VCC = 5.5 V
OSCin = VCC
OSCin = VCC – 2.2 V
Input HIGH Current (DATA and CLK)
–
1.0
μ
A
Input LOW Current (DATA and CLK)
–10
–5.0
–
μ
A
Input Current (OSCin)
–
–
130
–310
–
–
μ
A
Input HIGH Current (LE and FC)
IIH
IIL
–
1.0
2.0
μ
A
Input LOW Current (LE and FC)
–75
–60
–
μ
A
Charge Pump Output Current
ISource
6
ISink
6
IHi–Z
–2.6
–2.0
–1.4
mA
VDo = Vp/2; Vp = 2.7 V
VBISW = Vp/2; Vp = 2.7 V
0.5< VDO < Vp – 0.5
0.5 < VBISW < Vp – 0.5
Do and BISW
+1.4
+2.0
+2.6
–15
–
+15
nA
Output HIGH Voltage (LD,
φ
R,
φ
P, fOUT
)
VOH
4.4
–
–
V
VCC = 5.0 V
2.4
–
–
V
VCC = 3.0 V
VCC = 5.0 V
Output LOW Voltage (LD,
φ
R,
φ
P, fOUT
)
VOL
–
–
0.4
V
–
–
0.4
V
VCC = 3.0 V
Output HIGH Current (LD,
φ
R,
φ
P, fOUT
)
Output LOW Current (LD,
φ
R,
φ
P, fOUT
)
1. VCC = 3.3 V, all outputs open.
2. VCC = 5.5 V, all outputs open.
3. VP = 3.3 V, all outputs open.
IOH
–1.0
–
–
mA
IOL
1.0
–
–
mA
4. Vp = 6.0 V, all outputs open.
5. AC coupling, FIN measured with a 1000 pF capacitor.
6. Source current flows out of the pin and sink current flows into the pin.
Figure 8. Typical External Charge Pump Circuit
φ
P
EXTERNAL CHARGE
PUMP OUTPUT
φ
R
Vp
10 k
10 k
12 k
12 k
Figure 9. Typical Lock Detect Circuit
LD
LOCK DETECT
OUTPUT
VCC
100 k
10 k
33 k
0.01
μ
F
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