參數(shù)資料
型號(hào)： MC10H130FN
廠商： MOTOROLA INC
元件分類： 通用總線功能
英文描述： Dual Latch
中文描述： 10H SERIES, DUAL LOW LEVEL TRIGGERED D LATCH, COMPLEMENTARY OUTPUT, PQCC20
封裝： PLASTIC, LCC-20
文件頁數(shù)： 1/4頁
文件大小： 95K
代理商： MC10H130FN
SEMICONDUCTOR TECHNICAL DATA
2–49
REV 5
Motorola, Inc. 1996
3/93
The MC10H130 is a MECL 10H part which is a functional/pinout duplication
of the standard MECL 10K family part, with 100% improvement in clock speed
and propagation delay and no increase in power–supply current.
Propagation Delay, 1.0 ns Typical
Power Dissipation, 155 mW Typical
Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
Voltage Compensated
MECL 10K–Compatible
MAXIMUM RATINGS
Characteristic
Symbol
Rating
Unit
Power Supply (VCC = 0)
Input Voltage (VCC = 0)
Output Current— Continuous
VEE
VI
Iout
–8.0 to 0
Vdc
0 to VEE
50
100
Vdc
— Surge
mA
Operating Temperature Range
TA
Tstg
0 to +75
°
C
°
C
°
C
Storage Temperature Range— Plastic
— Ceramic
–55 to +150
–55 to +165
ELECTRICAL CHARACTERISTICS
(VEE = –5.2 V
±
5%) (See Note)
0
°
25
°
75
°
Characteristic
Symbol
Min
Max
Min
Max
Min
Max
Unit
Power Supply Current
IE
IinH
—
38
—
35
—
38
mA
μ
A
Input Current High
Pins 6, 11
Pins 7, 9, 10
Pins 4, 5, 12, 13
—
—
—
468
545
434
—
—
—
275
320
255
—
—
—
275
320
255
Input Current Low
IinL
VOH
VOL
VIH
VIL
0.5
—
0.5
—
0.3
—
μ
A
Vdc
High Output Voltage
–1.02
–0.84
–0.98
–0.81
–0.92
–0.735
Low Output Voltage
–1.95
–1.63
–1.95
–1.63
–1.95
–1.60
Vdc
High Input Voltage
–1.17
–0.84
–1.13
–0.81
–1.07
–0.735
Vdc
Low Input Voltage
–1.95
–1.48
–1.95
–1.48
–1.95
–1.45
Vdc
AC PARAMETERS
Propagation Delay
Data
Set, Reset
Clock, CE
tpd
0.4
0.6
0.5
1.6
1.7
1.6
0.4
0.7
0.5
1.7
1.8
1.7
0.4
0.8
0.6
1.8
1.9
1.8
ns
Rise Time
tr
tf
0.5
1.6
0.5
1.7
0.5
1.8
ns
Fall Time
0.5
1.6
0.5
1.7
0.5
1.8
ns
Set–up Time
tset
thold
2.2
—
2.2
—
2.2
—
ns
Hold Time
0.7
—
0.7
—
0.7
—
ns
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through
a 50–ohm resistor to –2.0 volts.
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
S1 5
D1 7
CE1 6
R1 4
C 9
R2 13
CE2 11
D2 10
S2 12
Q1
Q1
Q2
Q2
2
3
14
15
LOGIC DIAGRAM
DIP
PIN ASSIGNMENT
VCC1
Q1
Q1
R1
S1
CE1
D1
VEE
VCC2
Q2
Q2
R2
S2
CE2
D2
C
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
TRUTH TABLE
C
D
CE
Qn+1
L
H
Qn
L
H
X
X
X
L
L
L
H
H
L
L
H
L
H
Qn
Qn
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
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