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SEMICONDUCTOR TECHNICAL DATA
2–29
REV 6
Motorola, Inc. 1996
9/96
The MC10H125 is a quad translator for interfacing data and control signals
between the MECL section and saturated logic section of digital systems. The
10H part is a functional/pinout duplication of the standard MECL 10K family
part, with 100% improvement in propagation delay, and no increase in
power–supply current.
Outputs of unused translators will go to low state when their inputs are left
open.
Propagation Delay, 2.5 ns Typical
Improved Noise Margin 150 mV
(Over Operating Voltage and Temperature Range)
Voltage Compensated
MECL 10K–Compatible
MAXIMUM RATINGS
Characteristic
Symbol
Rating
Unit
Power Supply (VCC = 5.0 V)
Power Supply (VEE = –5.2 V)
Input Voltage (VCC = 5.0 V)
Operating Temperature Range
VEE
VCC
VI
TA
Tstg
–8.0 to 0
Vdc
0 to +7.0
Vdc
0 to VEE
0 to +75
Vdc
°
C
Storage Temperature Range — Plastic
— Ceramic
–55 to +150
–55 to +165
°
C
°
C
ELECTRICAL CHARACTERISTICS
(VEE = –5.2 V
±
5%; VCC = 5.0 V
±
5.0 %)
(See Note)
0
°
25
°
75
°
Characteristic
Symbol
Min
Max
Min
Max
Min
Max
Unit
Negative Power
Supply Drain
Current
Positive Power Supply
Drain Current
IE
—
44
—
40
—
44
mA
ICCH
ICCL
IinH
ICBO
VOH
—
63
—
63
—
63
mA
pp y
—
40
—
40
—
40
mA
Input Current
—
225
—
145
—
145
μ
A
Input Leakage Current
—
1.5
—
1.0
—
1.0
μ
A
High Output Voltage
IOH = –1.0 mA
Low Output Voltage
IOL = +20 mA
High Input Voltage(1)
2.5
—
2.5
—
2.5
—
Vdc
VOL
—
0.5
—
0.5
—
0.5
Vdc
VIH
VIL
IOS
VBB
VCMR
–1.17
–0.84
–1.13
–0.81
–1.07
–0.735
Vdc
Low Input Voltage(1)
–1.95
–1.48
–1.95
–1.48
–1.95
–1.45
Vdc
Short Circuit Current
60
150
60
150
50
150
mA
Reference Voltage
–1.38
–1.27
–1.35
–1.25
–1.31
–1.19
Vdc
Common Mode
Range (3)
—
—
–2.85 to +0.3
V
Typical
Input Sensitivity (4)
VPP
150
mV
AC PARAMETERS
Propagation Delay
tpd
tr
tf
0.8
3.3
0.85
3.35
0.9
3.4
ns
Rise Time(5)
0.3
1.2
0.3
1.2
0.3
1.2
ns
Fall Time(5)
0.3
1.2
0.3
1.2
0.3
1.2
ns
NOTES:
1. When VBB is used as the reference voltage.
equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse
air flow greater than 500 linear fpm is maintained.
3. Differential input not to exceed 1.0 Vdc.
4. 150 mVp–p differential input required to obtain full logic swing on output.
LOGIC DIAGRAM
DIP
PIN ASSIGNMENT
VBB
AIN
AIN
AOUT
BOUT
BIN
BIN
VEE
GND
DIN
DIN
DOUT
COUT
CIN
CIN
VCC
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
4
3
2
5
7
6
12
11
10
13
15
14
1
GND = PIN 16
VCC ( +5.0 VDC)= PIN 9
VEE ( –5.2 VDC) = PIN 8
*VBB to be used to supply bias to the MC10H125
only and bypassed (when used) with 0.01
μ
F to
0.1
μ
F capacitor to ground (0 V). VBB can source
< 1.0 mA.
VBB*
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).