tPHL
參數(shù)資料
型號(hào): MC10EP195FAG
廠商: ON Semiconductor
文件頁(yè)數(shù): 5/20頁(yè)
文件大?。?/td> 0K
描述: IC DELAY LINE 1024TAP 32-LQFP
標(biāo)準(zhǔn)包裝: 250
系列: 10EP
標(biāo)片/步級(jí)數(shù): 1024
功能: 可編程
延遲到第一抽頭: 2.2ns
接頭增量: 10ps
可用的總延遲: 2.2ns ~ 12.2ns
獨(dú)立延遲數(shù): 1
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-LQFP
供應(yīng)商設(shè)備封裝: 32-LQFP(7x7)
包裝: 托盤
其它名稱: MC10EP195FAGOS
MC10EP195, MC100EP195
http://onsemi.com
13
Figure 5. AC Reference Measurement
IN
Q
tPHL
tPLH
VINPP = VIH(D) VIL(D)
VOUTPP = VOH(Q) VOL(Q)
Cascading Multiple EP195s
To increase the programmable range of the EP195,
internal cascade circuitry has been included. This circuitry
allows for the cascading of multiple EP195s without the
need for any external gating. Furthermore, this capability
requires only one more address line per added E195.
Obviously, cascading multiple programmable delay chips
will result in a larger programmable range: however, this
increase is at the expense of a longer minimum delay.
Figure 6 illustrates the interconnect scheme for cascading
two EP195s. As can be seen, this scheme can easily be
expanded for larger EP195 chains. The D10 input of the
EP195 is the CASCADE control pin. With the interconnect
scheme of Figure 6 when D10 is asserted, it signals the need
for a larger programmable range than is achievable with a
single device and switches output pin CASCADE HIGH and
pin CASCADE LOW. The A11 address can be added to
generate a cascade output for the next EP195. For a 2device
configuration, A11 is not required.
VEE
D0
VCC
Q
NC
VCC
CASCADE
EN
SETMAX
V
CC
V
EE
LEN
D2 D1
CASCADE
SETMIN
VBB
IN
VEE
D8
VEF
D3
D4
D5
D6
D7
D9
D10
IN
VCF
INPUT
OUTPUT
VEE
D0
VCC
Q
NC
VCC
CASCADE
EN
SETMAX
V
CC
V
EE
LEN
D2 D1
CASCADE
SETMIN
VBB
IN
VEE
D8
VEF
D3
D4
D5
D6
D7
D9
D10
IN
VCF
EP195
CHIP #2
EP195
CHIP #1
ADDRESS BUS
A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
Need if Chip #3 is used
Figure 6. Cascading Interconnect Architecture
相關(guān)PDF資料
PDF描述
AD8400ARZ100-REEL IC POT DGTL 8BIT SGL 100K 8SOIC
MS27484E20F35PB CONN PLUG 79POS STRAIGHT W/PINS
AD8400AR100-REEL IC POT DIG SGLE 100K 8BIT 8SOIC
MS27468T19B11SA CONN RCPT 11POS JAM NUT W/SCKT
AD5161BRM100 IC POT DGTL 100K 256POS 10-MSOP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC10EP195FAR2 功能描述:延遲線/計(jì)時(shí)元素 3.3V ECL RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時(shí)間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube
MC10EP195FAR2G 功能描述:延遲線/計(jì)時(shí)元素 3.3V ECL Programmable Delay RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時(shí)間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube
MC10EP195MNG 功能描述:延遲線/計(jì)時(shí)元素 BBG ECL PRG DLAY CHP RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時(shí)間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube
MC10EP195MNR4G 功能描述:延遲線/計(jì)時(shí)元素 BBG ECL PRG DLAY CHP RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時(shí)間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube
MC10EP29DT 功能描述:觸發(fā)器 3.3V/5V ECL Dual RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel