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參數(shù)資料
| 型號： | MC10EP016FAG |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 3/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC COUNTER 8BIT SYNC ECL 32LQFP |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 系列： | 10EP |
| 邏輯類型： | 二進(jìn)制計數(shù)器 |
| 方向： | 上 |
| 元件數(shù)： | 1 |
| 每個元件的位元數(shù)： | 8 |
| 復(fù)位： | 異步 |
| 計時： | 同步 |
| 計數(shù)速率： | 1.4GHz |
| 觸發(fā)器類型： | 正，負(fù) |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-LQFP |
| 供應(yīng)商設(shè)備封裝： | 32-LQFP（7x7） |
| 包裝： | 托盤 |
| 其它名稱： | MC10EP016FAGOS |
MC10EP016, MC100EP016
http://onsemi.com
11
Applications Information (continued)
H
L
H
LLL
H
TC
PE
CE
TCLD
CLK
P7
P6
P4
P3
P2
P1 P0
P5
Q7 Q6
Q4 Q3
Q2 Q1 Q0
Q5
Figure 5. Mod 2 to 256 Programmable Divider
CLK
COUT
To determine what value to load into the device to
accomplish the desired division, the designer simply
subtracts the binary equivalent of the desired divide ratio
from the binary value for 256. As an example for a divide
ratio of 113:
Pn's = 256 - 113 = 8F16 = 1000 1111
where:
P0 = LSB and P7 = MSB
Forcing this input condition as per the setup in Figure 5
will result in the waveforms of Figure 6. Note that the TC
output is used as the divide output and the pulse duration is
equal to a full clock period. For even divide ratios, twice the
desired divide ratio can be loaded into the EP016 and the TC
output can feed the clock input of a toggle flip flop to create
a signal divided as desired with a 50% duty cycle.
Table 13. PRESET VALUES FOR VARIOUS DIVIDE
RATIOS
Divide
Ratio
Preset Data Inputs
P7
P6
P5
P4
P3
P2
P1
P0
2
H
L
3
H
HHHH
L
H
4
H
HHHH
L
5
H
HHH
L
H
w
w
112
H
L
H
LLL
L
113
H
L
HHH
H
114
H
L
HHH
L
254
L
LLLL
H
L
255
L
LLLLL
H
256
L
A single EP016 can be used to divide by any ratio from 2
to 256 inclusive. If divide ratios of greater than 256 are
needed multiple EP016s can be cascaded in a manner similar
to that already discussed. When EP016s are cascaded to
build larger dividers the TCLD pin will no longer provide a
means for loading on terminal count. Because one does not
want to reload the counters until all of the devices in the
chain have reached terminal count, external gating of the TC
pins must be used for multiple EP016 divider chains.
PE
CLK
TC
Load
DIVIDE BY 113
Load
1001 0000
1001 0001
1111 1100
1111 1101
1111 1110
1111 1111
Figure 6. Divide by 113 EP016 Programmable Divider Waveforms
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC10EP016FAR2 | 功能描述:計數(shù)器移位寄存器 3.3V/5V ECL 8-Bit RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| MC10EP016FAR2G | 功能描述:計數(shù)器移位寄存器 3.3V/5V ECL 8-Bit Synchronous Binary RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| MC10EP01D | 功能描述:邏輯門 3.3V/5V ECL 4-Input RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| MC10EP01DG | 功能描述:邏輯門 3.3V/5V ECL 4-Input OR/NOR RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| MC10EP01DR2 | 功能描述:邏輯門 3.3V/5V ECL 4-Input RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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