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參數(shù)資料
| 型號： | MC10E136 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | Octal TTL-To-ECL Translator With D-Type Edge-Triggered Flip-Flops and Output Enable 24-SOIC 0 to 70 |
| 中文描述： | 6位通用加/減計(jì)數(shù)器 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 172K |
| 代理商： | MC10E136 |
D0
D3
D4
D5
VCCO
Q5
Q4
VCCO
Q3
Q2
VCC
VCCO
COUT
COUT
CLOUT
VCCO
Q1
Q0
VCCO
D1
MR
CLIN
CIN
CLK
VEE
S1
S2
D2
4
3
2
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
7
8
6
5
Pinout: 28-lead PLCC
(Top View)
* All VCC and VCCO pins are tied together on the die.
SEMICONDUCTOR TECHNICAL DATA
2–1
REV 2
Motorola, Inc. 1996
5/95
The MC10E/100E136 is a 6-bit synchronous, presettable, cascadable
universal counter. The device generates a look-ahead-carry output and
accepts a look-ahead-carry input. These two features allow for the
cacading of multiple E136’s for wider bit width counters that operate at
very nearly the same frequency as the stand alone counter.
550 MHz Count Frequency
Fully Synchronous Up and Down Counting
Internal 75 k
Input Pulldown Resistors
Look-Ahead-Carry Input and Output
Asynchronous Master Reset
Extended 100E VEE Range of –4.2 V to –5.46 V
The CLOUT output will pulse LOW for one clock cycle one count
before the E136 reaches terminal count. The COUT output will pulse
LOW for one clock cycle when the counter reaches terminal count. For
more information on utilizing the look-ahead-carry features of the device
please refer to the applications section of this data sheet. The differential
COUT output facilitates the E136’s use in programmable divider and
self-stopping counter applications.
Unlike the H136 and other similar universal counter designs the E136
carry out and look-ahead-carry out signals are registered on chip. This
design alleviates the glitch problem seen on many counters where the carry out signals are merely gated. Because of this
architecture there are some minor functional differences between the E136 and H136 counters. The user, regardless of
familiarity with the H136, should read this data sheet carefully. Note specifically (see logic diagram) the operation of the carry out
outputs and the look-ahead-carry in input when utilizing the master reset.
When left open all of the input pins will be pulled LOW via an input pulldown resistor. The master reset is an asynchronous
signal which when asserted will force the Q outputs LOW.
The Q outputs need not be terminated for the E136 to function properly, in fact if these outputs will not be used in a system it is
recommended to save power and minimize noise that they be left open. This practice will minimize switching noise which can
reduce the maximum count frequency of the device or significantly reduce margins against other noise in the system.
PIN NAMES
Pin
Function
D0 – D5
Q0 – Q5
S1, S2
MR
CLK
COUT, COUT
CLOUT
CIN
CLIN
Preset Data Inputs
Data Inputs
Mode Control Pins
Master Reset
Clock Input
Carry-Out Output (Active LOW)
Look-Ahead-Carry Out (Active LOW)
Carry-In Input (Active LOW)
Look-Ahead-Carry In Input (Active LOW)
FUNCTION TABLE
(
Expanded truth table on page 2–4)
S1
S2
CIN
MR
CLK
Function
L
L
L
H
H
H
X
L
H
H
L
L
H
X
X
L
H
L
H
X
X
L
L
L
L
L
L
H
Z
Z
Z
Z
Z
Z
X
Preset Parallel Data
Increment (Count Up)
Hold Count
Decrement (Count Down)
Hold Count
Hold Count
Reset (Qn = LOW)
6-BIT UNIVERSAL
UP/DOWN COUNTER
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC100E136FN | 10896068 |
| MC10E137FN | 8-BIT RIPPLE COUNTER |
| MC10E137 | Octal TTL-To-ECL Translator With D-Type Edge-Triggered Flip-Flops and Output Enable 24-PDIP 0 to 70 |
| MC100E137FN | 8-BIT RIPPLE COUNTER |
| MC10E141FN | 8-BIT SHIFT REGISTER |
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| MC10E136FNR2 | 功能描述:計(jì)數(shù)器移位寄存器 5V ECL 6-Bit Binary RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
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