參數(shù)資料
型號: MC10172L
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: Dual Binary to 1-4 Decoder(High)
中文描述: 10K SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDIP16
封裝: CERAMIC, DIP-16
文件頁數(shù): 1/5頁
文件大小: 113K
代理商: MC10172L
SEMICONDUCTOR TECHNICAL DATA
3–112
REV 5
Motorola, Inc. 1996
3/93
!
The MC10172 is a binary-coded 2 line to dual 4 line decoder with selected
outputs high. With either E0 or E1 low, the corresponding selected 4 outputs are
low. The common enable E, when high, forces all outputs low.
PD= 325 mW typ/pkg (No Load)
tpd= 4.0 ns typ
tr, tf= 2.0 ns typ (20%–80%)
LOGIC DIAGRAM
VCC1= PIN 1
VCC2= PIN 16
VEE= PIN 8
E0 14
A 9
B 7
E 15
E1 2
10 Q0 3
11 Q0 2
12 Q0 1
13 Q0 0
3 Q1 3
4 Q1 2
5 Q1 1
6 Q1 0
TRUTH TABLE
E
E1
E0
A
B
Q10
Q11
Q12
Q13
Q00
Q01
Q02
Q03
L
L
L
L
L
L
H
H
H
H
H
L
H
X
H
H
H
H
H
L
X
L
L
H
H
L
L
X
L
H
L
H
L
L
X
H
L
L
L
L
H
L
L
H
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
H
L
L
L
H
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
DIP
PIN ASSIGNMENT
VCC1
E1
Q13
Q12
Q11
Q10
B
VEE
VCC2
E
E0
Q00
Q01
Q02
Q03
A
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
相關PDF資料
PDF描述
MC10172P Dual Binary to 1-4 Decoder(High)
MC10173L Quad 2-Input Multiplexer/ Latch
MC10173 Quad 2-Input Multiplexer/Latch
MC10173FN Quad 2-Input Multiplexer/ Latch
MC10173P Quad 2-Input Multiplexer/ Latch
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