參數(shù)資料
型號(hào): MC100LVEL31D
廠商: ON SEMICONDUCTOR
元件分類: 鎖存器
英文描述: 100LVEL SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
封裝: SOIC-8
文件頁(yè)數(shù): 2/8頁(yè)
文件大?。?/td> 136K
代理商: MC100LVEL31D
MC100LVEL31
http://onsemi.com
2
Figure 1. Logic Diagram and Pinout Assignment
1
2
3
45
6
7
8
Q
VEE
VCC
D
Q
CLK
R
D
S
Flip Flop
R
S
PIN
FUNCTION
CLK
ECL Clock Input
Q, Q
ECL Differential Data Outputs
D
ECL Data Input
R
ECL Reset Input
S
ECL Set Input
VCC
Positive Supply
VEE
Negative Supply
Table 1. PIN DESCRIPTION
D
L
H
X
Table 2. TRUTH TABLE
S
L
H
L
H
R
L
H
CLK
Z
X
Q
L
H
L
Undef
Z = LOW to HIGH Transition
X = Don’t Care
Q
H
L
H
Undef
EP
Exposed pad must be connected to a sufficient
thermal conduit. Electrically connect to the
most negative supply or leave floating open.
Table 3. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
VCC
PECL Mode Power Supply
VEE = 0 V
8 to 0
V
VEE
NECL Mode Power Supply
VCC = 0 V
8 to 0
V
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
VI VCC
VI VEE
6 to 0
V
Iout
Output Current
Continuous
Surge
50
100
mA
TA
Operating Temperature Range
40 to +85
°C
Tstg
Storage Temperature Range
65 to +150
°C
qJA
Thermal Resistance (JunctiontoAmbient)
0 lfpm
500 lfpm
8 SOIC
190
130
°C/W
qJC
Thermal Resistance (JunctiontoCase)
Standard Board
8 SOIC
41 to 44 ± 5%
°C/W
qJA
Thermal Resistance (JunctiontoAmbient)
0 lfpm
500 lfpm
8 TSSOP
185
140
°C/W
qJC
Thermal Resistance (JunctiontoCase)
Standard Board
8 TSSOP
41 to 44 ± 5%
°C/W
qJA
Thermal Resistance (JunctiontoAmbient)
0 lfpm
500 lfpm
DFN8
129
84
°C/W
Tsol
Wave Solder
Pb
PbFree
<2 to 3 sec @ 248°C
<2 to 3 sec @ 260°C
265
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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