MC10EP01, MC100EP01
http://onsemi.com
2
1
2
3
45
6
7
8
Q
VEE
VCC
D1
Q
D2
D3
D0
Figure 1. 8Lead Pinout (Top View)
and Logic Diagram
Table 1. PIN DESCRIPTION
Pin
Function
D0 D3
ECL Data Inputs
Q, Q
ECL Data Outputs
VCC
Positive Supply
VEE
Negative Supply
EP
(DFN8 only) Thermal exposed pad must be
connected to a sufficient thermal conduit. Elec-
trically connect to the most negative supply
(GND) or leave unconnected, floating open.
Table 2. TRUTH TABLE
D0*
D1*
D2*
D3*
Q
L
H
X
H
L
X
H
X
H
L
X
H
X
H
L
X
H
L
H
L
*Pins will default LOW when left open.
Table 3. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
75 kW
Internal Input Pullup Resistor
N/A
ESD Protection
Human Body Model
Machine Model
Charged Device Model
> 4 kV
> 200 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note
1)Pb Pkg
PbFree Pkg
SOIC8
TSSOP8
DFN8
Level 1
Level 3
Level 1
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V0 @ 0.125 in
Transistor Count
115 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.