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參數(shù)資料
| 型號： | MC-454CB64S |
| 廠商： | NEC Corp. |
| 英文描述： | 4M-Word By 64-BIT Dynamic RAM Module(動態(tài)RAM模塊) |
| 中文描述： | 分詞，64位動態(tài)RAM模塊（動態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 8/16頁 |
| 文件大小： | 138K |
| 代理商： | MC-454CB64S |
8
MC-454CB64S
Synchronous Characteristics
-80
-10
-10B
Unit
Note
Parameter
Symbol
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
Clock cycle time
/CAS latency = 3
t
CK3
8
(125
MHz)
10
(100
MHz)
10
(100
MHz)
ns
/CAS latency = 2
t
CK2
10
(100
MHz)
13
(77
MHz)
15
(67
MHz)
ns
Access time from CLK
/CAS latency = 3
t
AC3
6
6
7
ns
1
/CAS latency = 2
t
AC2
6
7
8
ns
1
CLK high level width
t
CH
3
3
3.5
ns
CLK low level width
t
CL
3
3
3.5
ns
/CAS latency = 3
t
OH3
3
3
3
ns
1
Data-out hold time
/CAS latency = 2
t
OH2
3
3
3
ns
1
Data-out low-impedance time
t
LZ
0
0
0
ns
Data-out high-impedance time
/CAS latency = 3
t
HZ3
3
6
3
6
3
7
ns
/CAS latency = 2
t
HZ2
3
6
3
7
3
8
ns
Data-in setup time
t
DS
2
2
2.5
ns
Data-in hold time
t
DH
1
1
1
ns
Address setup time
t
AS
2
2
2.5
ns
Address hold time
t
AH
1
1
1
ns
CKE setup time
t
CKS
2
2
2.5
ns
CKE hold time
t
CKH
1
1
1
ns
CKE setup time (Power down exit)
t
CKSP
2
2
2.5
ns
Command (/CS0, /RAS, /CAS, /WE,
DQMB0 - DQMB7) setup time
t
CMS
2
2
2.5
ns
Command (/CS0, /RAS, /CAS, /WE,
DQMB0 - DQMB7) hold time
t
CMH
1
1
1
ns
Note 1.
Output load
Output
Z = 50
1.4 V
50 pF
50
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