參數(shù)資料
型號(hào): MB9AF312LPMC1
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP64
封裝: 0.50 MM PITCH, PLASTIC, LQFP-64
文件頁(yè)數(shù): 34/114頁(yè)
文件大?。?/td> 1357K
代理商: MB9AF312LPMC1
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)當(dāng)前第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)
ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
26
Main purpose of the delay is to keep the AVR in reset until it is supplied with minimum VCC. The delay will not monitor the
actual voltage and it will be required to select a delay longer than the VCC rise time. If this is not possible, an internal or
external brown-out detection circuit should be used. A BOD circuit will ensure sufficient VCC before it releases the reset, and
the time-out delay can be disabled. Disabling the time-out delay without utilizing a brown-out detection circuit is not
recommended.
The oscillator is required to oscillate for a minimum number of cycles before the clock is considered stable. An internal ripple
counter monitors the oscillator output clock, and keeps the internal reset active for a given number of clock cycles. The reset
is then released and the device will start to execute. The recommended oscillator start-up time is dependent on the clock
type, and varies from 6 cycles for an externally applied clock to 32K cycles for a low frequency crystal.
The start-up sequence for the clock includes both the time-out delay and the start-up time when the device starts up from
reset. When starting up from power-save or power-down mode, VCC is assumed to be at a sufficient level and only the start-
up time is included.
9.3
Low Power Crystal Oscillator
Pins XTAL1 and XTAL2 are input and output, respectively, of an inverting amplifier which can be configured for use as an
on-chip oscillator, as shown in Figure 9-2 on page 26. Either a quartz crystal or a ceramic resonator may be used.
This crystal oscillator is a low power oscillator, with reduced voltage swing on the XTAL2 output. It gives the lowest power
consumption, but is not capable of driving other clock inputs, and may be more susceptible to noise in noisy environments. In
C1 and C2 should always be equal for both crystals and resonators. The optimal value of the capacitors depends on the
crystal or resonator in use, the amount of stray capacitance, and the electromagnetic noise of the environment. Some initial
guidelines for choosing capacitors for use with crystals are given in Table 9-3. For ceramic resonators, the capacitor values
given by the manufacturer should be used.
Figure 9-2. Crystal Oscillator Connections
The low power oscillator can operate in three different modes, each optimized for a specific frequency range. The operating
mode is selected by the fuses CKSEL3...1 as shown in Table 9-3.
Table 9-3.
Low Power Crystal Oscillator Operating Modes(3)
Frequency Range
(MHz)
Recommended Range for
Capacitors C1 and C2 (pF)
CKSEL3...1(1)
0.4 - 0.9
100(2)
0.9 - 3.0
12 - 22
101
3.0 - 8.0
12 - 22
110
8.0 - 16.0
12 - 22
111
Notes: 1.
This is the recommended CKSEL settings for the difference frequency ranges.
2.
This option should not be used with crystals, only with ceramic resonators.
3.
If the crystal frequency exceeds the specification of the device (depends on VCC), the CKDIV8 fuse can be
programmed in order to divide the internal frequency by 8. It must be ensured that the resulting divided clock
meets the frequency specification of the device.
C2
XTAL2 (TOSC2)
XTAL1 (TOSC1)
GND
C1
相關(guān)PDF資料
PDF描述
MB9AF312MPMC 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP80
MB9AF312LPMC 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP64
MB9AF311NPMC 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP100
MB9AF316NPMC RISC MICROCONTROLLER, PQFP100
MB9AF314NPMC RISC MICROCONTROLLER, PQFP100
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MB9AF314LAPMC1-G-JNE2 制造商:FUJITSU 功能描述:
MB9AF314LAPMC-G-JNE2 制造商:Fujitsu 功能描述:Bulk
MB9AF314LAQN-G-AVE2 功能描述:ARM? Cortex?-M3 FM3 MB9A310A Microcontroller IC 32-Bit 40MHz 256KB (256K x 8) FLASH 64-QFN Exposed Pad (9x9) 制造商:cypress semiconductor corp 系列:FM3 MB9A310A 包裝:托盤(pán) 零件狀態(tài):有效 核心處理器:ARM? Cortex?-M3 核心尺寸:32-位 速度:40MHz 連接性:CSIO,I2C,LIN,UART/USART,USB 外設(shè):DMA,LVD,POR,PWM,WDT I/O 數(shù):51 程序存儲(chǔ)容量:256KB(256K x 8) 程序存儲(chǔ)器類型:閃存 EEPROM 容量:- RAM 容量:32K x 8 電壓 - 電源(Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 9x12b 振蕩器類型:內(nèi)部 工作溫度:-40°C ~ 105°C(TA) 封裝/外殼:64-VFQFN 裸露焊盤(pán) 供應(yīng)商器件封裝:64-QFN 裸露焊盤(pán)(9x9) 標(biāo)準(zhǔn)包裝:260
MB9AF314LPMC1-ESE1 制造商:FUJITSU 功能描述:
MB9AF314LPMC1-GE1 制造商:FUJITSU 功能描述: