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參數(shù)資料
| 型號： | MB95FV100D-103 |
| 廠商： | Fujitsu Limited |
| 英文描述： | 8-bit Proprietary Microcontrollers(8位微控制器) |
| 中文描述： | 8位微控制器專利（8位微控制器） |
| 文件頁數(shù)： | 62/72頁 |
| 文件大小： | 739K |
| 代理商： | MB95FV100D-103 |
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MB95100AM Series
62
(2) Notes on Using A/D Converter
About the external impedance of analog input and its sampling time
A/D converter with sample and hold circuit. If the external impedance is too high to keep sufficient sampling
time, the analog voltage charged to the internal sample and hold capacitor is insufficient, adversely affecting A/
D conversion precision. Therefore, to satisfy the A/D conversion precision standard, consider the relationship
between the external impedance and minimum sampling time and either adjust the register value and operating
frequency or decrease the external impedance so that the sampling time is longer than the minimum value.
Also, if the sampling time cannot be sufficient, connect a capacitor of about 0.1
μ
F to the analog input pin.
About errors
As |AVR - AV
SS
| becomes smaller, values of relative errors grow larger.
R
C
Analog input
Note : The values are reference values.
Analog input equivalent circuit
R
C
4.5 V
≤
AVcc
≤
5.5 V
4.0 V
≤
AVcc < 4.5 V
2.0 k
(Max)
8.2 k
(Max)
16 pF (Max)
16 pF (Max)
Comparator
During sampling : ON
0
2
4
6
8
10
12
14
0
10
20
30
40
50
60
70
80
90
100
AV
CC
≥
4.5 V
AV
CC
≥
4.0 V
0
1
2
3
4
0
2
4
6
8
10
12
14
16
18
20
AV
CC
≥
4.5 V
AV
CC
≥
4.0 V
(External impedance
=
0 k
to 100 k
)
(External impedance
=
0 k
to 20 k
)
Minimum sampling time [
μ
s]
E
]
Minimum sampling time [
μ
s]
E
]
The relationship between external impedance and minimum sampling time
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