參數(shù)資料
型號(hào)： MB91F610APMC
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 33 MHz, RISC MICROCONTROLLER, PQFP120
封裝： 16 X 16 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-120
文件頁(yè)數(shù)： 17/53頁(yè)
文件大?。?/td> 2625K
代理商： MB91F610APMC
MB91610 Series
2
DS07-16907-2E
- Built-in multiplier/instruction-level support
- Signed 32-bit multiplication
: 5 cycles
- Signed 16-bit multiplication
: 3 cycles
- Interrupts (save PC and PS) : 6 cycles, 16 priority levels
- Harvard architecture allowing program access and data access to be executed simultaneously
- Instruction prefetch function has been added with 4 word instruction queue of CPU
Instruction compatible with FR family CPU
- Additional bit search instructions
- No resource instructions and coprocessor instructions
Maximum operating frequency
CPU : 33 MHz
Resources : 33 MHz
DMA controller (DMAC)
8 channels
Address space : 32 bits (4 Gbytes)
Transfer modes : Block transfer/burst transfer/demand transfer
Address update : Increment/decrement/fixed (increment/decrement step size of 1, 2, or 4)
Transfer data length : Selectable from 8-bit, 16-bit, 32-bit
Block size : 1 to 16
Number of transfers : 1 to 65535
Transfer requests
- Requests from software
- Interrupt requests from peripheral resources (interrupt requests are shared, including external interrupts)
Reload functions : Reload can be specified on all channels
Priority order : Fixed (ch.0 > ch.1 > ch.2 > ch.3 > ...) or round-robin
Interrupt requests : Interrupts can be generated for transfer complete, transfer error, and transfer interrupted.
Multifunction serial interface
4 channels with 16-byte FIFO, 4 channels without FIFO
Operation mode is selectable from UART/CSIO/I2C for each channel (For ch.0, I2C is not available.)
UART
- Full-duplex double buffer
- Selectable parity on/off
- Built-in dedicated baud rate generator
- External clock can be used as a serial clock
- Error detection function for parity, frame and overrun errors
CSIO
- Full-duplex double buffer
- Built-in dedicated baud rate generator
- Overrun error detection function
I2C
- Supports both standard mode (Max 100 kbps) and Fast mode (Max 400 kbps)
- Some channels are 5 V tolerant
(Continued)
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