
MB91460M Series
24
DS07-16613-2E
■ HANDLING DEVICES
Preventing Latch-up
Latch-up may occur in a CMOS IC if a voltage higher than VCC or less than VSS is applied to an input or output
pin or if a voltage exceeding the rating is applied between VCC and VSS pins.
If latch-up occurs, the power supply current increases rapidly, sometimes resulting in thermal breakdown of the
device. Therefore, be very careful not to apply voltages in excess of the absolute maximum ratings.
Handling of unused input pins
If unused input pins are left open, abnormal operation may result. Any unused input pins should be connected
to pull-up or pull-down resistor (2 K
Ω or more) or enable internal pull up or pull down resistors before setting the
global port enable bit.
Unused input and output pins need to leave open at the output state, or treat the same as for the input pin when
they are at the input state.
Power supply pins
The MB91460M series has multiple of VCC and VSS pins.
The device is designed such that pins necessary to be at the same potential are interconnected internally to
prevent malfunctions such as latch-up. However, all of these pins must be connected externally to the power
supply or ground in order to minimize undesired electromagnetic radiation, prevent strobe signal malfunctions
due to the rise in ground level, and conform to the total output current rating.
Moreover, connect the current supply source with the VCC and VSS pins of this device at the low impedance.
It is also recommended that a ceramic capacitor of around 0.1
μF be connected as a bypass capacitor between
the VCC and VSS pins at a location close to the device.
This series has a built-in regulator. Connect a bypass capacitor of 4.7
μF to C_1 and C_2 pins for the regulator.
Crystal oscillator circuit
Noise in proximity to the X0 (X0A) and X1 (X1A) pins can cause the device to operate abnormally. Printed circuit
boards should be designed so that the X0 (X0A) and X1 (X1A) pins, and crystal oscillator (or ceramic oscillator),
as well as bypass capacitors connected to ground, are placed as close together as possible. When the signal
wires for transmitting from X0 and X1 pins are pulled along, use the circuit with them shielded on board. Be
careful especially when a pin next to X0 pin is used.
It is recommended that the printed circuit board layout be designed such that the X0 and X1 pins or X0A and
X1A pins are surrounded by ground plane for the stable operation. Sub clock is also needed when dual clock
product is used as single clock product.
Please request the oscillator manufacturer to evaluate the oscillational characteristics of the crystal and this
device.
Treatment of NC and OPEN pins
Pins marked as NC and OPEN must be left open-circuit.
Mode pins (MD0 to MD4)
These pins should be connected directly to Vcc or Vss. To prevent the device from entering test mode accidentally
due to noise, minimize the lengths of the patterns between each mode pin and Vcc or Vss on the printed circuit
board as possible and connect them with low impedance.
Especially, MD3 must be directly connected to Vss with 0
Ω.