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參數(shù)資料
| 型號： | MB91F367GB |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP120 |
| 封裝： | 0.50 MM PITCH, PLASTIC, QFP-120 |
| 文件頁數(shù)： | 36/62頁 |
| 文件大?。?/td> | 724K |
| 代理商： | MB91F367GB |
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FME / EMDC / Br+JR - mb91f367g_f368g_ds.fm 41
14-Jan-02
Appendix A I/O Map
Version 1.3, 2000/02/28
Table A lists the addresses for the registers used by the internal peripheral functions of
the MB91F367GB/F368GB.
How to Read the I/O Map
Read/write attribute
Register initial value after a reset (bit initial values)
“1”: initial value “1”, “0”: initial value “0”,
“x”: initial value “X” (indeterminate),
“—” indicates non-existent bits
Register name (The register in column 1 is at location 4n, the register in
column 2 at 4n+1, and so on.)
Location of far left of register (+0). +1, +2, and +3 each increment the
location by one. When performing word access, the register in column 1 is
placed at the MSB end of the data.
Precautions:
Do not use RMW instructions on registers containing write-only (W) bits.
RMW instructions(RMW:read-modify-write)
AND Rj, @Ri
OR
Rj, @Ri
EOR Rj, @Ri
ANDH Rj, @Ri
ORH Rj, @Ri
EORH Rj, @Ri
ANDB Rj, @Ri
ORB Rj, @Ri
EORB Rj, @Ri
BANDL #u4, @Ri
BORL #u4, @Ri
BEORL #u4, @Ri
BANDH #u4, @Ri
BORH #u4, @Ri
BEORH #u4, @Ri
The data in reserved areas and areas marked “
” is indeterminate. Do not use those areas!
Address
Register
Block
+0
+1
+2
+3
000000H
Reserved
T-unit
Port Data
Register
000004H
Reserved
000008H
Reserved
00000CH
Reserved
Address
Register
Internal
peripheral
+0
+1
+2
+3
000014H
PDRG [R/W]
PDRH [R/W]
PDRI [R/W]
—
Port data
register
XXXXXXXX
----
XXXX
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相關(guān)代理商/技術(shù)參數(shù) |
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| MB91F367GBPMT | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller |
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| MB91F368GBPMCR-GE1 | 制造商:FUJITSU 功能描述: |
| MB91F368GBPMT | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller |
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