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參數(shù)資料
| 型號(hào)： | MB91F367GB |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP120 |
| 封裝： | 0.50 MM PITCH, PLASTIC, QFP-120 |
| 文件頁(yè)數(shù)： | 3/62頁(yè) |
| 文件大?。?/td> | 724K |
| 代理商： | MB91F367GB |
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FME / EMDC / Br+JR - mb91f367g_f368g_ds.fm 11
14-Jan-02
External Interrupt
(8 channels)
can be programmed to be edge sensitive
or level sensitive
interrupt masking and request pending
bits per channel
I2C-1
for standard mode
master or slave transmission
arbitration function
clock synchronization function
slave address and general call address
detect function
transfer direction detect function
start condition repeat generation and
detection function
bus error detect function
compatible to I2C standard mode specifi-
cation (operation up to 100 kHz,
7 bit addressing)
includes clock divider functionality
Clock disable
Only I2C-1 or I2C-2 can be used, not
both in parallel. Bit 0 of F362MD will
be used to decide which module is
connected to the SCL and SDA
pads. By default it is I2C-1.
I2C-2
for standard and fast
mode
master or slave transmission
arbitration function
clock synchronization function
slave address and general call address
detect function
transfer direction detect function
start condition repeat generation and
detection function
bus error detect function
compatible to I2C standard and fast mode
specification (operation up to 400 kHz,
10 bit addressing)
includes clock divider functionality
Clock disable
Only I2C-1 or I2C-2 can be used, not
both in parallel. Bit 0 of F362MD will
be used to decide which module is
connected to the SCL and SDA
pads. By default it is I2C-1.
SCL and SDA lines include optional
noise filter. The noise filter allows
the suppression of spikes in the
range of 1 to 1.5 cycles of CLKP.
Communication on the I2C bus
between other connected devices is
not possible if MB91F36xGA is not
connected to the power supply.
16-bit Input Capture
(ICU)
(4 channels)
rising edge, falling edge or rising & falling
edge sensitive
two 16-bit capture registers
signals an interrupt at external event
Clock disable
16-bit Output Compare
OCU
(2 channels)
signals an interrupt when a match with
of 16-bit IO timer occurs
an output signal can be generated
Clock disable
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PDF描述 |
|---|---|
| MB91F368GB | 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP120 |
| MB91F463NCPMC-GSE1 | 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP64 |
| MB91F464AAPMC-GSE2 | 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP100 |
| MB91F464AA | 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP100 |
| MB91F465CAPMC-GSE2 | 32-BIT, FLASH, RISC MICROCONTROLLER, PQFP144 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB91F367GBPMT | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller |
| MB91F368GA | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-BIT MICROCONTROLLER |
| MB91F368GB | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller |
| MB91F368GBPMCR-GE1 | 制造商:FUJITSU 功能描述: |
| MB91F368GBPMT | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller |
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