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參數(shù)資料
| 型號(hào)： | MB91F233APFF-GE1 |
| 廠商： | FUJITSU LTD |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 33.6 MHz, RISC MICROCONTROLLER, PQFP120 |
| 封裝： | PLASTIC, LQFP-120 |
| 文件頁(yè)數(shù)： | 7/68頁(yè) |
| 文件大小： | 879K |
| 代理商： | MB91F233APFF-GE1 |
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MB91230 Series
15
(Continued)
Pin no.
Pin name
Circuit type
Description
LQFP
FLGA
109
A6
INT2
A
External interrupt input.
This function is valid when corresponding bit of DDR1
register is set to input.
P12
General purpose input/output port.
This function is always valid.
110
B5
INT3
A
External interrupt input.
This function is valid when corresponding bit of DDR1
register is set to input.
P13
General purpose input/output port.
This function is always valid.
111
D5
INT4
A
External interrupt input.
This function is valid when corresponding bit of DDR1
register is set to input.
P14
General purpose input/output port.
This function is always valid.
112
B4
INT5
A
External interrupt input.
This function is valid when corresponding bit of DDR1
register is set to input.
P15
General purpose input/output port.
This function is always valid.
113
C5
INT6
A
External interrupt input.
This function is valid when corresponding bit of DDR1
register is set to input.
P16
General purpose input/output port.
This function is always valid.
114
A4
INT7
A
External interrupt input.
This function is valid when corresponding bit of DDR1
register is set to input.
P17
General purpose input/output port.
This function is always valid.
115
B3
CKI0
D
External clock input pin for free-run timer 0.
This function is enabled when corresponding bit of PFR2
register is set to port function and corresponding bit of
DDR2 register is set to input.
OP0
Output compare 0 output pin.
This function is valid when corresponding bit of PFR2
register is set to peripheral function.
P20
General purpose input/output port.
This function is valid when corresponding bit of PFR2
register is set to port function.
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