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參數(shù)資料
| 型號(hào)： | MB91F155APFV-G |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 33 MHz, RISC MICROCONTROLLER, PQFP144 |
| 封裝： | PLASTIC, LQFP-144 |
| 文件頁數(shù)： | 97/108頁 |
| 文件大?。?/td> | 2523K |
| 代理商： | MB91F155APFV-G |
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MB91350A Series
DS07-16503-5E
89
16. DMAC (DMA Controller)
(1) Description
This module provides direct memory access (DMA) transfers in the FR family devices.
The DMAC enables high speed transfers for various data without CPU intervention, thereby improving system
performance.
Hardware configuration
The main components of this module are as follows :
Independent DMA channels
× 5 channels
5 channels independent access control circuits
32-bit address registers (Supports reloading : 2 per channel)
16-bit transfer count registers (Supports reloading : 1 per channel)
4-bit block count registers (1 per channel)
External transfer request input pins : DREQ0, DREQ1, and DREQ2. For ch.0 to ch.2 only
Note : The MB91F353A/353A/352A/351A do not have an external interface.
External transfer request acceptance output pins : DACK0, DACK1, and DACK2. For ch.0 to ch.2 only
Note : The MB91F353A/353A/352A/351A do not have an external interface.
DMA end output pins : DEOP0, DEOP1, and DEOP2. For ch.0 to ch.2 only
Note : The MB91F353A/353A/352A/351A do not have an external interface.
Fly-by transfer (memory to I/O and I/O to memory). For ch.0 to ch.2 only
Note : The MB91F353A/353A/352A/351A do not support fly-by transfer.
2-cycle transfer
Main functions
This module has the following major functions for data transfer :
Supports data transfer over multiple independent channels (5 channels)
(1) Priority order (ch.0
> ch.1 > ch.2 > ch.3 > ch.4)
(2) Order can be reversed for ch.0 and ch.1
(3) DMAC activation triggers
External dedicated pin input (edge detection/level detection for ch.0 to ch.2 only)
Note : The MB91F353A/353A/352A/351A do not have an external interface.
Internal peripheral request (Interrupt request sharing, including external interrupts)
Software request (register write)
(4)Transmission mode
Demand transfer, burst transfer, step transfer, or block transfer
Addressing mode : 32-bit full addressing (increment, decrement, or fixed)
(address increment can be in the range - 255 to + 255)
Data length : Byte, halfword, or word
Single-shot or reload operation selectable
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB91F155PFV-G | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers |
| MB91F158 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers |
| MB91F158PFF-G | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers |
| MB91F191A | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontroller |
| MB91F191APFF | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontroller |
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