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參數(shù)資料
| 型號(hào)： | MB91107PFV-G |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 50 MHz, RISC MICROCONTROLLER, PQFP120 |
| 封裝： | PLASTIC, LQFP-120 |
| 文件頁數(shù)： | 110/111頁 |
| 文件大小： | 1337K |
| 代理商： | MB91107PFV-G |
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MB91107
98
Bit manipulation arithmetic instructions (8 instructions)
*1: Assembler generates BANDL if result of logical operation “u8&0x0F” leaves an active (set) bit and generates
BANDH if “u8&0xF0” leaves an active bit. Depending on the value in the “u8” format, both BANDL and BANDH
may be generated.
*2: Assembler generates BORL if result of logical operation “u8&0x0F” leaves an active (set) bit and generates
BORH if “u8&0xF0” leaves an active bit.
*3: Assembler generates BEORL if result of logical operation “u8&0x0F” leaves an active (set) bit and generates
BEORH if “u8&0xF0” leaves an active bit.
Add/subtract operation instructions (10 instructions)
*1: DIVOS, DIV1
× 32, DIV2, DIV3 and DIV4S are generated. A total instruction code length of 72 bytes.
*2: DIVOU and DIV1
× 32 are generated. A total instruction code length of 66 bytes.
Mnemonic
Type
OP
Cycle N Z V C
Operation
Remarks
BANDL
#u4, @Ri
(u4: 0 to 0FH)
BANDH
#u4, @Ri
(u4: 0 to 0FH)
* BAND
#u8, @Ri
*1
C
80
81
1 + 2a
–
––––
(Ri) & = (F0H + u4)
(Ri) & = ((u4<<4) + 0FH)
(Ri) & = u8
Manipulate lower 4 bits
Manipulate upper 4 bits
BORL
#u4, @Ri
(u4: 0 to 0FH)
BORH
#u4, @Ri
(u4: 0 to 0FH)
* BOR
#u8, @Ri
*2
C
90
91
1 + 2a
–
––––
(Ri) | = u4
(Ri) | = (u4<<4)
(Ri) | = u8
Manipulate lower 4 bits
Manipulate upper 4 bits
BEORL
#u4, @Ri
(u4: 0 to 0FH)
BEORH
#u4, @Ri
(u4: 0 to 0FH)
* BEOR
#u8, @Ri
*3
C
98
99
1 + 2a
–
––––
(Ri) ^ = u4
(Ri) ^ = (u4<<4)
(Ri) ^ = u8
Manipulate lower 4 bits
Manipulate upper 4 bits
BTSTL
#u4, @Ri
(u4: 0 to 0FH)
BTSTH
#u4, @Ri
(u4: 0 to 0FH)
C
88
89
2 + a
0C– –
CC – –
(Ri) & u4
(Ri) & (u4<<4)
Test lower 4 bits
Test upper 4 bits
Mnemonic
Type
OP
Cycle N Z V C
Operation
Remarks
MUL
Rj, Ri
MULU
Rj, Ri
MULH
Rj, Ri
MULUH
Rj, Ri
A
AF
AB
BF
BB
5
3
CCC –
CC – –
Rj
× Ri → MDH, MDL
Rj
× Ri → MDH, MDL
Rj
× Ri → MDL
Rj
× Ri → MDL
32-bit
× 32-bit = 64-bit
Unsigned
16-bit
× 16-bit = 32-bit
Unsigned
DIVOS
Ri
DIVOU
Ri
DIV1
Ri
DIV2
Ri
DIV3
DIV4S
* DIV
Ri
*1
* DIVU
Ri
*2
E
97 – 4
97 – 5
97 – 6
97 – 7
9F – 6
9F – 7
1
d
1
–
––––
–C–C
––––
–C–C
MDL/Ri
→ MDL,
MDL%Ri
→ MDH
MDL/Ri
→ MDL,
MDL%Ri
→ MDH
Step calculation
32-bit/32-bit = 32-bit
Unsigned
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MB91108PFV | 32-BIT, 50 MHz, RISC MICROCONTROLLER, PQFP120 |
| MB91107PFV | 32-BIT, 50 MHz, RISC MICROCONTROLLER, PQFP120 |
| MB91110PMT2 | 32-BIT, 50 MHz, RISC MICROCONTROLLER, PQFP144 |
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| MB91121PFV | 32-BIT, 50 MHz, RISC MICROCONTROLLER, PQFP120 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB91108 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller |
| MB91108PFV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller CMOS |
| MB91110 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-Bit RISC Microcontroller |
| MB911110PMT2 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-Bit RISC Microcontroller |
| MB91121 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller |
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