參數(shù)資料
型號(hào)： MB90V570A
廠商： Fujitsu Limited
英文描述： 16-bit Proprietary Microcontroller
中文描述： 16位微控制器專有
文件頁數(shù)： 49/135頁
文件大小： 2504K
代理商： MB90V570A
49
MB90570 Series
(3) Output Compare (OCU)
The output compare (OCU) is two sets of compare units consisting of four-channel OCU compare registers, a
comparator and a control register.
An interrupt request can be generated for each channel upon a match detection by performing time-division
comparison between the OCU compare data register setting value and the counter value of the 16-bit free run
timer.
The OUT pin can be used as a waveform output pin for reversing output upon a match detection or a general-
purpose output port for directly outputting the setting value of the CMOD bit.
Register Configuration
—
—
—
CMOD OTE1
OTE0
OTD1
OTD0
(OCS0, OCS2)
OCU control status register ch.1, ch.3 (OCS1, OCS3)
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7. . . . . . . . . . . . .
—
—
—
R/W
R/W
R/W
R/W
R/W
Address
000063
H
000065
H
Initial value
- - -00000
B
ICP1
ICP0
ICE1
ICE0
—
—
CST1
CST0
(OCS1, OCS3)
OCU control status register ch.0, ch.2 (OCS0, OCS2)
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
bit 15. . . . . . . . . . . .
R/W
R/W
R/W
R/W
—
—
R/W
R/W
C15
C14
C13
C12
C11
C10
C09
C08
OCU compare register ch.0 to ch.3 (OCCP0 to OCCP3)
Address
OCCP0 (high order address): 00005B
H
OCCP1 (high order address): 00005D
H
OCCP2 (high order address): 00005F
H
OCCP3 (high order address): 000061
H
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
XXXXXXXX
B
C07
C06
C05
C04
C03
C02
C01
C00
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W : Readable and writable
— : Reserved
X : Undefined
Initial value
0000- -00
B
Address
000062
H
000064
H
Initial value
XXXXXXXX
B
Address
OCCP0 (low order address): 00005A
H
OCCP1 (low order address): 00005C
H
OCCP2 (low order address): 00005E
H
OCCP3 (low order address): 000060
H
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