![](http://datasheet.mmic.net.cn/330000/MB90V520A_datasheet_16438173/MB90V520A_65.png)
MB90520A/520B Series
65
15. Clock Timer
The clock timer is a 15-bit freerun timer that counts up synchronized with the sub-clock.
Seven different interval time settings are available.
This timer provides the clock for the sub-clock’s oscillation stabilization delay timer and the watchdog timer.
This timer always counts the sub-clock, regardless of the settings in the clock selection register (CKSC) .
Clock timer functions
Clock timer interval times
Sub-Clock Period
SCLK : Sub-clock frequency
The values enclosed in ( ) are the times for a sub-clock frequency of 8.192 kHz.
Note that the sub-oscillation clock is divided by four to generate the sub-clock frequency. The sub-oscillation clock
operates at 32.768 kHz.
Clock periods generated by clock timer
Clock Supply
SCLK : Sub-clock frequency
The values enclosed in ( ) are the times for a sub-clock frequency of 8.192 kHz.
Note that the sub-oscillation clock is divided by four to generate the sub-clock frequency. The sub-oscillation clock
operates at 32.768 kHz.
Function
Interval time
Selectable from the seven settings shown in the table below.
15-bit
Oscillation stabilization delay timer for sub-clock and watchdog timer
Sub-oscillation clock divided by four. (SCLK : Sub-clock)
Interval time overflow
Not supported by the extended intelligent I/O service (EI
2
OS) .
Clock timer size
Clock supply
Source clock
Interrupts
EI
2
OS support
Interval Time
SCLK (122
μ
s)
2
9
/SCLK (approx. 62.5 ms)
2
10
/SCLK (approx. 125.0 ms)
2
11
/SCLK (approx. 250.0 ms)
2
12
/SCLK (approx. 500.0 ms)
2
13
/SCLK (approx. 1.0 s)
2
14
/SCLK (approx. 2.0 s)
2
16
/SCLK (approx. 4.0 s)
Clock Period
Oscillation stabilization delay timer
for sub-clock
2
14
/SCLK (approx. 2.0 s)
Watchdog timer
2
10
/SCLK (approx. 125.0 ms)
2
13
/SCLK (approx. 1.0 s)
2
14
/SCLK (approx. 2.0 s)
2
16
/SCLK (approx. 4.0 s)