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參數(shù)資料
| 型號： | MB90T553APF |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Quadruple Bus Buffer Gates With 3- State Outputs 14-CDIP -55 to 125 |
| 中文描述： | 16-BIT, 16 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 20 MM, 3.35 MM HEIGHT, 0.65 MM PITCH, PLASTIC, QFP-100 |
| 文件頁數(shù)： | 10/58頁 |
| 文件大小： | 695K |
| 代理商： | MB90T553APF |
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MB90550A/550B Series
10
(Continued)
Pin no.
Pin name
Circuit type
Function
QFP
LQFP
29
27
P51
G
(NchOD/H)
N-channel open-drain I/O port.
SCL0
I
2
C interface clock I/O pin. This function is enabled with the
I
2
C interface enabled for operation.
While the I
2
C interface is operating, place the port output in
the Hi-Z state (PDR = 1).
SIN0
Extended I/O serial data input pin.
Since this input is used as required while the extended I/O
serial interface is operating for input, the output by any other
function must be off unless used intentionally.
30,32
28,30
P52,P54
G
(NchOD/H)
N-channel open-drain I/O ports.
SDA1,SDA2
I
2
C interface data I/O pins. This function is enabled with the
I
2
C interface enabled for operation.
While the I
2
C interface is operating, place the port output in
the Hi-Z state (PDR = 1).
31,33
29,31
P53,P55
G
(NchOD/H)
N-channel open-drain I/O ports.
SCL1,SCL2
I
2
C interface clock I/O pins. This function is enabled with the
I
2
C interface enabled for operation.
While the I
2
C interface is operating, place the port output in
the Hi-Z state (PDR = 1).
38 to 41,
43 to 46
36 to 39,
41 to 44
P60 to P67
H
(CMOS/H)
General-purpose I/O ports.
AN0 to AN7
A/D converter analog input pin. This function is enabled with
the analog input enabled.
47,48,
53 to 58
45,46,
51 to 56
P70 to P77
I
(CMOS/H)
General-purpose I/O ports.
IRQ0 to IRQ7
External interrupt request input pins.
Since this input is used as required while external interrupts
remain enabled, the output by any other function must be off
unless used intentionally.
59,60
57,58
P80,P81
J
(CMOS/H)
General-purpose I/O ports.
TIN0,TIN1
Reload timer event input pins.
Since this input is used as required while the reload timer is
operating for input, the output by any other function must be
off unless used intentionally.
61,62
59,60
P82,P83
J
(CMOS/H)
General-purpose I/O ports.
TOT0,TOT1
Reload timer output pins.This function is enabled with reroad
timer output enabled.
63 to 66 61 to 64
P84 to P87
J
(CMOS/H)
General-purpose I/O ports.
IN0 to IN3
Input capture trigger input pins.
Since this input is used as required while the input capture
unit is operating for input, the output by any other function
must be off unless used intentionally.
67,68
65,66
P90,P91
J
(CMOS/H)
General-purpose I/O ports.
OUT0,OUT1
Output compare event output pins.
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