
7
MB90660A Series
(Continued)
*1: DIP-64P-M01
*2: FPT-64P-M09
Pin no.
Pin name
Circuit
type
Function
SH-DIP*
1
LQFP*
2
5
61
P42
E
(CMOS/H)
General-purpose I/O port.
This function is activated when the clock output specification
of the UART is “disabled”.
SCK
UART clock I/O pin.
This function is activated when the clock output specification
of the UART is “enabled”.
Input is used only as necessary while serving as UART input.
It is therefore necessary to stop output beforehand using other
functions unless intentionally used otherwise.
6
62
P43
E
(CMOS/H)
General-purpose I/O port.
This function is activated when the output specification of the
PWM is “disabled”.
PWM
PWM timer output pin.
This function is activated when the waveform output specifica-
tion of the PWM timer is “enabled”.
7
8
63
64
P44 to P45
D
(CMOS/H)
General-purpose I/O ports.
This function is always active.
INT0 to INT1
External interrupt request input pins.
Input is used only as necessary while external interrupts are
enabled.
9
1
P46
D
(CMOS/H)
General-purpose input port.
This function is always active.
INT2
External interrupt request input pin.
Input is used only as necessary while external interrupts are
enabled.
TRG
Timer clear trigger input pin for multi-function timer.
Input is used only as necessary while multi-function timer
input is enabled.
10
2
P47
D
(CMOS/H)
General-purpose input port.
This function is always active.
INT3
External interrupt request input pin.
Input is used only as necessary while external interrupts are
enabled.
ATG
Trigger input pin for the A/D converter.
Input is used only as necessary while the A/D converter is
performing input.
11 to 18
3 to 10
P50 to P57
C
(AD)
Open-drain type I/O ports.
This function is enabled when the analog input enable register
specification is “port”.
AN0 to AN7
Analog input pins for the A/D converter.
This function is enabled when the analog input enable register
specification is “AD”.