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參數(shù)資料
| 型號： | MB90P663APFM |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CAP 2.2UF 50V 20% X7R RAD.20 .40X.40 TR-13 |
| 中文描述： | 16-BIT, OTPROM, 32 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | PLASTIC, LQFP-64 |
| 文件頁數(shù)： | 43/84頁 |
| 文件大小： | 1440K |
| 代理商： | MB90P663APFM |
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43
MB90660A Series
10. Low Power Consumption Controller (CPU intermittent operation function, stable oscillation
wait time, and clock multiplier function)
The following operation modes are available: PLL clock mode, PLL sleep mode, clock mode, main clock mode,
main sleep mode and stop mode. Operation modes other than PLL clock mode are classified as low power
consumption modes.
Main clock mode and main sleep mode are modes where the microcontroller operates using the main clock
(OSC oscillation clock) only. In these modes, the main clock divided by two is used as the operation clock and
the PLL clock (VCO oscillation clock) is stopped.
In PLL sleep mode and main sleep mode, only the operation clock of the CPU is stopped, while operations
besides the CPU clock continue.
In clock mode, only the timebase timer is allowed to operate.
In stop mode, oscillation is stopped, allowing data to be held at the lowest power consumption possible.
The CPU intermittent operation function causes the clock provided to the CPU to function intermittently when
accessing registers, internal memory, internal resources and the external bus. This allows processing to be
performed at lower power consumption by reducing the CPU execution speed while continuing to provide a high
speed clock to internal resources.
The PLL clock multiplier can be selected as 1, 2, 3 or 4 using the CS1 and CS0 bits.
The stable oscillation wait time for the main clock when stop mode is cancelled can be set using the WS1 and
WS0 bits.
(1) Register Configuration
bit
Read/Write
Initial value
STP
SLP
SPL
RST
Reserved
CG1
CG0
Reserved
LPMCR
(W)
(0)
(W)
(0)
(R/W)
(0)
(W)
(1)
(–)
(1)
(R/W)
(0)
(R/W)
(0)
(–)
(0)
7
6
5
4
3
2
1
0
Low power consumption mode
control register
Address: 0000A0
H
bit
Read/Write
Initial value
Reserved
MCM WS1
WS0
Reserved
MCS
CS1
CS0
CKSCR
(–)
(1)
(R)
(1)
(R/W)
(1)
(R/W)
(1)
(–)
(1)
(R/W)
(1)
(R/W)
(0)
(R/W)
(0)
15
14
13
12
11
10
9
8
Clock selection register
Address: 0000A1
H
相關PDF資料 |
PDF描述 |
|---|---|
| MB90663APFM | 16-bit Proprietary Microcontroller |
| MB90662AP-SH | 16-bit Proprietary Microcontroller |
| MB90663AP-SH | 16-bit Proprietary Microcontroller |
| MB90662A | 16-Bit Proprietary Microcontroller(16位專用微控制器) |
| MB90660A | UL/CSA, T-BEAM, D-ON |
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