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參數(shù)資料
| 型號(hào)： | MB90P653APF |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-bit Proprietary Microcontroller |
| 中文描述： | 16-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁(yè)數(shù)： | 59/120頁(yè) |
| 文件大?。?/td> | 1690K |
| 代理商： | MB90P653APF |
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59
MB90650A Series
11. Watchdog Timer, Timebase Timer, and Watch Timer
The watchdog timer consists of a 2-bit watchdog counter that uses the carry signal from the 18-bit timebase
timer or the 15-bit watch timer as aclock source, a control register, and a watchdog reset controller.
The timebase timer consists of an 18-bit timer and a circuit that controls interval interrupts. Note that the timebase
timer uses the main clock, regardless of the setting of the MCS bit and SCS bit in CKSCR.
The watch timer consists of a 15-bit timer and a circuit that controls interval interrupts. Note that the watch timer
uses the sub clock, regardless of the setting of the MCS bit SCS bit in CKSCR.
(1) Register Configuration
Address : 0000A9
H
Reserved
—
—
TBIE
TBOF
TBR
TBC1
TBC0
—
—
—
R/W
R/W
W
R/W
R/W
Initial value
1--00000
B
Timebase timer control register (TBTC)
Watch timer control register (WTC)
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
Address : 0000AA
H
WDCS
SCE
WTIE WTOF
WTR
WTC2 WTC1 WTC0
R/W
R
R/W
R/W
R
R/W
R/W
R/W
Initial value
1X000000
B
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Watchdog timer control register (WDTC)
Address : 0000A8
H
PONR
—
WRST ERST SRST
WTE
WT1
WT0
R
—
R
R
R
W
W
W
Initial value
XXXXX111
B
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W
R
W
—
X
: Readable and writable
: Read only
: Write only
: Unused
: Indeterminate
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