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37
MB90650A Series
2. UART
The UART is a serial I/O port that can be used for CLK asynchronous (start-stop synchronization) or CLK
synchronous communications. The UART has the following features.
Full duplex, double buffered
Supports asynchronous (start-stop synchronization) and CLK synchronous data transfer
Supports multi-processor mode
Built-in dedicated baud rate generator
Supports flexible baud rate setting using an external clock
Error detect function (parity, framing, and overrun)
NRZ type transmission signal
Intelligent I/O service support
(1) Register Configuration
Asynchronous : 9615 bps, 31250 bps, 4808 bps, 2404 bps and 1202 bps
CLK synchronous : 1 Mbps, 500 kbps, 250 kbps, 125 kbps, 115.2 kbps and 62.5 kbps
For a 6, 8, 10, 12, or 16 MHz
clock.
MD1
MD0
CS2
CS1
CS0
Reserved
SCKE
SOE
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Initial value
Initial value
Initial value
Initial value
Initial value
00000000
B
PEN
P
SBL
CL
A/D
REC
RXE
TXE
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
00000100
B
D7
D6
D5
D4
D3
D2
D1
D0
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
XXXXXXXX
B
PE
ORE
FRE
RDRF TDRE
—
—
RIE
TIE
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
00001-00
B
Serial status register 0 (SSR0)
MD
—
—
—
—
—
—
DIV3
DIV2
DIV1
DIV0
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
0---1111
B
Clock division control register (CDCR)
CDCR
SCR
SSR
SIDR (R) /SODR (W)
SMR
—
8 bits
bit 15
bit 8 bit 7
bit 0
8 bits
R/W
R
W
—
X
: Readable and writable
: Read only
: Write only
: Unused
: Indeterminate
Address : 000020
H
Serial mode register 0 (SMR0)
Address : 000021
H
Serial control register 0 (SCR0)
Address : 000022
H
Address : 000023
H
Address : 000027
H
Serial input register/serial output register 0 (SIDR/SODR0)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R/W