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參數(shù)資料
| 型號： | MB90P553APFV |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-bit Proprietary Microcontroller |
| 中文描述： | 16-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 9/58頁 |
| 文件大?。?/td> | 695K |
| 代理商： | MB90P553APFV |
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MB90550A/550B Series
9
(Continued)
Pin no.
Pin name
Circuit type
Function
QFP
LQFP
22
20
P44
F
(CMOS/H)
General-purpose I/O port.
Serves as an open-drain output port (OD44 = 1) depending on
the setting of the open-drain control setting register (ODR4).
(D44 = 0: Disabled when the port is set for input.)
SOT1
Extended I/O serial data output pin.
This function is enabled with the extended I/O serial data output
enabled.
24
22
P45
F
(CMOS/H)
General-purpose I/O port.
Serves as an open-drain output port (OD45 = 1) depending on
the setting of the open-drain control setting register (ODR4).
(D45 = 0: Disabled when the port is set for input.)
SIN1
Extended I/O serial data input pin.
Since this input is used as required while the extended I/O serial
interface is operating for input, the output by any other function
must be off unless used intentionally.
25
23
P46
F
(CMOS/H)
General-purpose I/O port.
Serves as an open-drain output port (OD46 = 1) depending on
the setting of the open-drain control setting register (ODR4).
(D46 = 0: Disabled when the port is set for input.)
ADTG
A/D converter external trigger input pin.
Since this input is used as required while the A/D converter is op-
erating for input, the output by any other function must be off un-
less used intentionally.
26
24
P47
F
(CMOS/H)
General-purpose I/O port.
Serves as an open-drain output port (OD47 = 1) depending on
the setting of the open-drain control setting register (ODR4).
D47 = 0: Disabled when the port is set for input.
SCK0
Extended I/O serial clock I/O pin. This function is enabled with
the extended I/O serial clock output enabled.
27
25
C
—
Capacitance pin for regulating the power supply.
Connect an external ceramic capacitor of about 0.1
μ
F.
N-channel open-drain I/O port.
28
26
P50
G
(NchOD/H)
SDA0
I
2
C interface data I/O pin.
This function is enabled with the I
2
C interface enabled for
operation.
While the I
2
C interface is operating, place the port output in the
Hi-Z state (PDR = 1).
SOT0
Extended I/O serial data output pin.
This function is enabled with the extended I/O serial data output
enabled.
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