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參數(shù)資料
| 型號： | MB90P553APFV |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-bit Proprietary Microcontroller |
| 中文描述： | 16-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 4/58頁 |
| 文件大?。?/td> | 695K |
| 代理商： | MB90P553APFV |
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MB90550A/550B Series
4
(Continued)
Part number
*:Varies with conditions such as the operating frequency. (See section “
I
ELECTRICAL CHARACTERISTICS”)
Assurance for the MB90V550A is given only for operation with a tool at a power voltage of 4.5 V to 5.5 V, an
operating temperature of 0
°
C to +25
°
C, and an operating frequency of 1 MHz to 16 MHz.
I
PACKAGE AND CORRESPONDING PRODUCTS
: Available
×
: Not available
Note:For more information about each package, see section “
I
PACKAGE DIMENSIONS”
I
DIFFERENCES AMONG PRODUCTS
Memory Size
In evaluation with an evaluation product, note the difference between the evaluation product and the product
actually used. The following items must be taken into consideration.
The MB90V550A does not have an internal ROM. However, operations equivalent to those performed by a
chip with an internal ROM can be evaluated by using a dedicated development tool, enabling selection of ROM
size by setting the development tool.
In the MB90V550A, images from FF4000
H
to FFFFFF
H
are mapped to bank 00, and FE0000
H
to FF3FFF
H
are mapped to bank FE and FF only. (This setting can be changed by configuring the development tool.)
In the MB90F553A/553A/553B/552A/552B, images from FF4000
H
to FFFFFF
H
are mapped to bank 00, and
FF0000
H
to FF3FFF
H
to bank FF only.
Item
MB90552A
MB90552B
MB90553A
MB90553B
MB90F553A MB90P553A MB90T552A
MB90T553A
MB90V550A
DTP/external
interrupt circuit
Number of inputs: 8
Started by a rising edge, a falling edge, an “H” level input, or an “L” level input.
External interrupt circuit or extended intelligent I/O service (EI
2
OS) can be used.
Extended I/O serial
interface
Clock synchronized transmission (3125 bps to 1 Mbps)
LSB first/MSB first
I
2
C interface
Serial I/O port for supporting Inter IC BUS
Timebase timer
18-bit counter
Interrupt interval: 1.024 ms, 4.096 ms, 16.384 ms, 131.072 ms
(at oscillation of 4 MHz)
Watchdog timer
Reset generation interval: 3.58 ms, 14.33 ms, 57.23 ms, 458.75 ms
(at oscillation of 4 MHz, minimum value)
Process
CMOS
Power supply volt-
age for operation*
4.5 V to 5.5 V
Package
MB90552A
MB90552B
MB90553A
MB90553B
MB90F553A
MB90P553A
FPT-100P-M05
×
FPT-100P-M06
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