MB90920 Series
24
DS07-13750-3E
(Continued)
Address
Register name
Symbol
Read/write
Resource name
Initial value
000054H Lower timer control status register 1
TMCSR1L
R/W
16-bit reload timer
1
00000000B
000055H Higher timer control status register 1
TMCSR1H
R/W
XXX10000B
000056H
Timer register 1/reload register 1
TMR1/
TMRLR1
R/W
XXXXXXXXB
000057H
XXXXXXXXB
000058H LCD output control register 1
LOCR1
R/W
LCDC
11111111B
000059H LCD output control register 2
LOCR2
R/W
00000000B
00005AH Lower sound control register 0
SGCRL0
R/W
Sound generator 0
00000000B
00005BH Higher sound control register 0
SGCRH0
R/W
0XXXX100B
00005CH Frequency data register 0
SGFR0
R/W
XXXXXXXXB
00005DH Amplitude data register 0
SGAR0
R/W
00000000B
00005EH Decrement grade register 0
SGDR0
R/W
XXXXXXXXB
00005FH Tone count register 0
SGTR0
R/W
XXXXXXXXB
000060H
Input capture register 0
IPCP0
R
Input capture 0/1
XXXXXXXXB
000061H
XXXXXXXXB
000062H
Input capture register 1
IPCP1
R
XXXXXXXXB
000063H
XXXXXXXXB
000064H
Input capture register 2
IPCP2
R
Input capture 2/3
XXXXXXXXB
000065H
XXXXXXXXB
000066H
Input capture register 3
IPCP3
R
XXXXXXXXB
000067H
XXXXXXXXB
000068H Input capture control status 0/1
ICS01
R/W
Input capture 0/1
00000000B
000069H Input capture edge register 0/1
ICE01
R/W
XXX0X0XXB
00006AH Input capture control status 2/3
ICS23
R/W
Input capture 2/3
00000000B
00006BH Input capture edge register 2/3
ICE23
R/W
XXXXXXXXB
00006CH Lower LCD control register
LCRL
R/W
LCD controller/
driver
00010000B
00006DH Higher LCD control register
LCRH
R/W
00000000B
00006EH
Low voltage/CPU operation
detection reset control register
LVRC
R/W
Low voltage/CPU
operation
detection reset
00111000B
00006FH ROM mirror
ROMM
W
ROM mirror
XXXXXXX1B
000070H
to
00007FH
Area reserved for CAN Controller 1. Refer to “
■ CAN CONTROLLERS”
000080H PWM control register 0
PWC0
R/W
Stepping motor
controller 0
000000X0B
000081H
(Disabled)
000082H PWM control register 1
PWC1
R/W
Stepping motor
controller 1
000000X0B