參數(shù)資料
型號(hào)： MB90F897
廠商： Fujitsu Limited
英文描述： 10-Bit Buffers/Drivers With 3-State Outputs 24-CFP -55 to 125
中文描述： 16位微控制器專有
文件頁(yè)數(shù)： 66/78頁(yè)
文件大?。?/td> 746K
代理商： MB90F897
MB90895 Series
66
(4) UART0/UART1 timing
(V
CC
=
4.5 V to 5.5 V, V
SS
=
0.0 V, T
A
=
40
°
C to
+
105
°
C)
* : Refer to "(1) Clock timing" ratings for t
CP
(internal operation clock cycle time).
Notes:
AC rating in CLK synchronous mode.
C
L
is a load capacitance value on pins for testing.
Parameter
Symbol
Pin name
Conditions
Value
Unit Remarks
Min
Max
Serial clock cycle time
t
SCYC
SCK0/SCK1
Internal shift clock
mode output pin is :
C
L
=
80 pF+1TTL
8 t
CP
*
ns
SCK
↓
→
SOT delay time
t
SLOV
SCK0/SCK1,
SOT0/SOT1
80
+
80
ns
Valid SIN
→
SCK
↑
t
IVSH
SCK0/SCK1,
SIN0/SIN1
100
ns
SCK
↑
→
valid SIN hold time
t
SHIX
SCK0/SCK1,
SIN0/SIN1
60
ns
Serial clock “H” pulse width
t
SHSL
SCK0/SCK1
External shift clock
mode output pin is :
C
L
=
80 pF+1TTL
4 t
CP
*
ns
Serial clock “L” pulse width
t
SLSH
SCK0/SCK1
4 t
CP
*
ns
SCK
↓
→
SOT delay time
t
SLOV
SCK0/SCK1,
SOT0/SOT1
150
ns
Valid SIN
→
SCK
↑
t
IVSH
SCK0/SCK1,
SIN0/SIN1
60
ns
SCK
↑
→
valid SIN hold time
t
SHIX
SCK0/SCK1,
SIN0/SIN1
60
ns
相關(guān)PDF資料
PDF描述
MB90V495G 16-bit Proprietary Microcontroller
MB90F897PMT 10-Bit Buffers/Drivers With 3-State Outputs 24-CDIP -55 to 125
MB90F897S 10-Bit Buffers/Drivers With 3-State Outputs 28-LCCC -55 to 125
MB90F897SPMT 10-Bit Buffers/Drivers With 3-State Outputs 24-CDIP -55 to 125
MB90M405 Octal Edge-Triggered D-type Flip-Flops With Clear 20-CFP -55 to 125
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