參數(shù)資料
型號: MB90F897
廠商: Fujitsu Limited
英文描述: 10-Bit Buffers/Drivers With 3-State Outputs 24-CFP -55 to 125
中文描述: 16位微控制器專有
文件頁數(shù): 39/78頁
文件大?。?/td> 746K
代理商: MB90F897
MB90895 Series
39
Clock timer block diagram
Actual interrupt request number of clock timer is as follows :
Interrupt request number : #28 (1C
H
)
Clock timer counter
A 15-bit up counter that uses sub clock (SCLK) as a count clock.
Counter clear circuit
A circuit that clears the clock timer counter.
WTOF
WTR
WTC1 WTC0
WTC2
WDCS
SCE
WTIE
Clock timer control register (WTC)
2
5
2
4
2
3
2
1
2
9
2
10
2
11
2
12
2
13
2
14
2
15
2
8
2
7
2
6
2
2
SCLK
OF
OF
OF
OF
OF
OF
OF
OF
To watchdog
timer
Clock timer counter
Power-on reset
Shift to hardware standby
Shift to stop mode
To sub clock oscillation
stabilizing wait time
Interval timer
selector
Clock time interrupt
OF
SCLK : Sub clock
: Overflow
Counter
clear
circuit
相關(guān)PDF資料
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MB90V495G 16-bit Proprietary Microcontroller
MB90F897PMT 10-Bit Buffers/Drivers With 3-State Outputs 24-CDIP -55 to 125
MB90F897S 10-Bit Buffers/Drivers With 3-State Outputs 28-LCCC -55 to 125
MB90F897SPMT 10-Bit Buffers/Drivers With 3-State Outputs 24-CDIP -55 to 125
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