
MB90800 Series
25
I
PERIPHERAL RESOURCES
1.
I/O port
The I/O ports function to output data from the CPU to I/O pins via their port data register (PDR) and send signals
input to I/O pins to the CPU. In addition, the port can randomly set the direction of the input/output of the I/O pin
in bit by the port direction register (DDR).
The MB90800 series has 68 (70 ports when the subclock is not used) input/output pins. Port0 to port8 (port0 to
port9 when the subclock is not used) are input/output port.
(1) Port data register
When reading : Read the corresponding pin level.
When writing : Write into the latch for the input/output.
Output mode
When reading : Read the value of the data register latch.
When writing : Write into the corresponding pin.
PDR0
Address : 000000
H
Initial Value
Indeterminate
Access
R/W*
PDR1
Address : 000001
H
Indeterminate
R/W*
PDR2
Address : 000002
H
Indeterminate
R/W*
PDR3
Address : 000003
H
Indeterminate
R/W*
PDR4
Address : 000004
H
Indeterminate
R/W*
PDR5
Address : 000005
H
Indeterminate
R/W*
PDR6
Address : 000006
H
Indeterminate
R/W*
PDR7
Address : 000007
H
Indeterminate
R/W*
PDR8
Address : 000008
H
Indeterminate
R/W*
PDR9
Address : 000009
H
Indeterminate
R/W*
7
6
5
4
3
2
1
0
P06
P07
P05
P04
P03
P02
P01
P00
15
14
13
12
11
10
9
8
P16
P17
P15
P14
P13
P12
P11
P10
7
6
5
4
3
2
1
0
P26
P27
P25
P24
P23
P22
P21
P20
15
14
13
12
11
10
9
8
P36
P37
P35
P34
P33
P32
P31
P30
7
6
5
4
3
2
1
0
P46
P47
P45
P44
P43
P42
P41
P40
15
14
13
12
11
10
9
8
P56
P57
P55
P54
P53
P52
P51
P50
7
6
5
4
3
2
1
0
P66
P65
P64
P63
P62
P61
P60
P67
15
14
13
12
11
10
9
8
P76
P75
P74
P73
P72
P71
P70
7
6
5
4
3
2
1
0
P84
P83
P82
P81
P80
15
14
13
12
11
10
9
8
P91
P90