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參數(shù)資料
| 型號(hào)： | MB90F598PF |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-bit Proprietary Microcontroller |
| 中文描述： | 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁數(shù)： | 14/52頁 |
| 文件大?。?/td> | 295K |
| 代理商： | MB90F598PF |
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MB90595/595G Series
14
(12) Initialization
The device contains internal registers which are initialized only by a power-on reset. To initialize these registers,
please turn on the power again.
(13) Directions of “DIV A, Ri” and “DIVW A, RWi” instructions
In the signed multiplication and division instructions (“DIV A, Ri” and “DIVW A, RWi”), the value of the corre-
sponding bank register (DTB, ADB, USB, SSB) is set in “00
H
”.
If the values of the corresponding bank register (DTB,ADB,USB,SSB) are set to other than “00
H
”, the remainder
by the execution result of the instruction is not stored in the register of the instruction operand.
(14) Using REALOS
The use of EI
2
OS is not possible with the REALOS real time operating system.
(15) Caution on Operations during PLL Clock Mode
If the PLL clock mode is selected in the microcontroller, it may attempt to continue the operation using the free-
running frequency of the automatic oscillating circuit in the PLL circuitry even if the oscillator is out of place or
the clock input is stopped. Performance of this operation, however, cannot be guaranteed.
Oscillation setting time
2
Power-on reset
1
Vcc (Power-supply pin)
PONR (power-on reset) signal
RST (external asynchronous reset) signal
RST (internal reset) signal
Oscillation clock signal
KA (internal operation clock A) signal
KB (internal operation clock B) signal
PORT (port output) signal
High-impedance
*1:Power-on reset time: Period of “clock frequency
×
2
17
” (Clock frequency of 16 MHz: 8.19 ms)
*2:Oscillation setting time: Period of “clock frequency
×
2
18
” (Clock frequency of 16 MHz: 16.38ms)
RST pin is “L”
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